Source file src/cmd/compile/internal/ssa/rewriteMIPS.go

     1  // Code generated from _gen/MIPS.rules using 'go generate'; DO NOT EDIT.
     2  
     3  package ssa
     4  
     5  import "cmd/compile/internal/types"
     6  
     7  func rewriteValueMIPS(v *Value) bool {
     8  	switch v.Op {
     9  	case OpAbs:
    10  		v.Op = OpMIPSABSD
    11  		return true
    12  	case OpAdd16:
    13  		v.Op = OpMIPSADD
    14  		return true
    15  	case OpAdd32:
    16  		v.Op = OpMIPSADD
    17  		return true
    18  	case OpAdd32F:
    19  		v.Op = OpMIPSADDF
    20  		return true
    21  	case OpAdd32withcarry:
    22  		return rewriteValueMIPS_OpAdd32withcarry(v)
    23  	case OpAdd64F:
    24  		v.Op = OpMIPSADDD
    25  		return true
    26  	case OpAdd8:
    27  		v.Op = OpMIPSADD
    28  		return true
    29  	case OpAddPtr:
    30  		v.Op = OpMIPSADD
    31  		return true
    32  	case OpAddr:
    33  		return rewriteValueMIPS_OpAddr(v)
    34  	case OpAnd16:
    35  		v.Op = OpMIPSAND
    36  		return true
    37  	case OpAnd32:
    38  		v.Op = OpMIPSAND
    39  		return true
    40  	case OpAnd8:
    41  		v.Op = OpMIPSAND
    42  		return true
    43  	case OpAndB:
    44  		v.Op = OpMIPSAND
    45  		return true
    46  	case OpAtomicAdd32:
    47  		v.Op = OpMIPSLoweredAtomicAdd
    48  		return true
    49  	case OpAtomicAnd32:
    50  		v.Op = OpMIPSLoweredAtomicAnd
    51  		return true
    52  	case OpAtomicAnd8:
    53  		return rewriteValueMIPS_OpAtomicAnd8(v)
    54  	case OpAtomicCompareAndSwap32:
    55  		v.Op = OpMIPSLoweredAtomicCas
    56  		return true
    57  	case OpAtomicExchange32:
    58  		v.Op = OpMIPSLoweredAtomicExchange
    59  		return true
    60  	case OpAtomicLoad32:
    61  		v.Op = OpMIPSLoweredAtomicLoad32
    62  		return true
    63  	case OpAtomicLoad8:
    64  		v.Op = OpMIPSLoweredAtomicLoad8
    65  		return true
    66  	case OpAtomicLoadPtr:
    67  		v.Op = OpMIPSLoweredAtomicLoad32
    68  		return true
    69  	case OpAtomicOr32:
    70  		v.Op = OpMIPSLoweredAtomicOr
    71  		return true
    72  	case OpAtomicOr8:
    73  		return rewriteValueMIPS_OpAtomicOr8(v)
    74  	case OpAtomicStore32:
    75  		v.Op = OpMIPSLoweredAtomicStore32
    76  		return true
    77  	case OpAtomicStore8:
    78  		v.Op = OpMIPSLoweredAtomicStore8
    79  		return true
    80  	case OpAtomicStorePtrNoWB:
    81  		v.Op = OpMIPSLoweredAtomicStore32
    82  		return true
    83  	case OpAvg32u:
    84  		return rewriteValueMIPS_OpAvg32u(v)
    85  	case OpBitLen16:
    86  		return rewriteValueMIPS_OpBitLen16(v)
    87  	case OpBitLen32:
    88  		return rewriteValueMIPS_OpBitLen32(v)
    89  	case OpBitLen8:
    90  		return rewriteValueMIPS_OpBitLen8(v)
    91  	case OpClosureCall:
    92  		v.Op = OpMIPSCALLclosure
    93  		return true
    94  	case OpCom16:
    95  		return rewriteValueMIPS_OpCom16(v)
    96  	case OpCom32:
    97  		return rewriteValueMIPS_OpCom32(v)
    98  	case OpCom8:
    99  		return rewriteValueMIPS_OpCom8(v)
   100  	case OpConst16:
   101  		return rewriteValueMIPS_OpConst16(v)
   102  	case OpConst32:
   103  		return rewriteValueMIPS_OpConst32(v)
   104  	case OpConst32F:
   105  		v.Op = OpMIPSMOVFconst
   106  		return true
   107  	case OpConst64F:
   108  		v.Op = OpMIPSMOVDconst
   109  		return true
   110  	case OpConst8:
   111  		return rewriteValueMIPS_OpConst8(v)
   112  	case OpConstBool:
   113  		return rewriteValueMIPS_OpConstBool(v)
   114  	case OpConstNil:
   115  		return rewriteValueMIPS_OpConstNil(v)
   116  	case OpCtz16:
   117  		return rewriteValueMIPS_OpCtz16(v)
   118  	case OpCtz16NonZero:
   119  		v.Op = OpCtz32
   120  		return true
   121  	case OpCtz32:
   122  		return rewriteValueMIPS_OpCtz32(v)
   123  	case OpCtz32NonZero:
   124  		v.Op = OpCtz32
   125  		return true
   126  	case OpCtz8:
   127  		return rewriteValueMIPS_OpCtz8(v)
   128  	case OpCtz8NonZero:
   129  		v.Op = OpCtz32
   130  		return true
   131  	case OpCvt32Fto32:
   132  		v.Op = OpMIPSTRUNCFW
   133  		return true
   134  	case OpCvt32Fto64F:
   135  		v.Op = OpMIPSMOVFD
   136  		return true
   137  	case OpCvt32to32F:
   138  		v.Op = OpMIPSMOVWF
   139  		return true
   140  	case OpCvt32to64F:
   141  		v.Op = OpMIPSMOVWD
   142  		return true
   143  	case OpCvt64Fto32:
   144  		v.Op = OpMIPSTRUNCDW
   145  		return true
   146  	case OpCvt64Fto32F:
   147  		v.Op = OpMIPSMOVDF
   148  		return true
   149  	case OpCvtBoolToUint8:
   150  		v.Op = OpCopy
   151  		return true
   152  	case OpDiv16:
   153  		return rewriteValueMIPS_OpDiv16(v)
   154  	case OpDiv16u:
   155  		return rewriteValueMIPS_OpDiv16u(v)
   156  	case OpDiv32:
   157  		return rewriteValueMIPS_OpDiv32(v)
   158  	case OpDiv32F:
   159  		v.Op = OpMIPSDIVF
   160  		return true
   161  	case OpDiv32u:
   162  		return rewriteValueMIPS_OpDiv32u(v)
   163  	case OpDiv64F:
   164  		v.Op = OpMIPSDIVD
   165  		return true
   166  	case OpDiv8:
   167  		return rewriteValueMIPS_OpDiv8(v)
   168  	case OpDiv8u:
   169  		return rewriteValueMIPS_OpDiv8u(v)
   170  	case OpEq16:
   171  		return rewriteValueMIPS_OpEq16(v)
   172  	case OpEq32:
   173  		return rewriteValueMIPS_OpEq32(v)
   174  	case OpEq32F:
   175  		return rewriteValueMIPS_OpEq32F(v)
   176  	case OpEq64F:
   177  		return rewriteValueMIPS_OpEq64F(v)
   178  	case OpEq8:
   179  		return rewriteValueMIPS_OpEq8(v)
   180  	case OpEqB:
   181  		return rewriteValueMIPS_OpEqB(v)
   182  	case OpEqPtr:
   183  		return rewriteValueMIPS_OpEqPtr(v)
   184  	case OpGetCallerPC:
   185  		v.Op = OpMIPSLoweredGetCallerPC
   186  		return true
   187  	case OpGetCallerSP:
   188  		v.Op = OpMIPSLoweredGetCallerSP
   189  		return true
   190  	case OpGetClosurePtr:
   191  		v.Op = OpMIPSLoweredGetClosurePtr
   192  		return true
   193  	case OpHmul32:
   194  		return rewriteValueMIPS_OpHmul32(v)
   195  	case OpHmul32u:
   196  		return rewriteValueMIPS_OpHmul32u(v)
   197  	case OpInterCall:
   198  		v.Op = OpMIPSCALLinter
   199  		return true
   200  	case OpIsInBounds:
   201  		return rewriteValueMIPS_OpIsInBounds(v)
   202  	case OpIsNonNil:
   203  		return rewriteValueMIPS_OpIsNonNil(v)
   204  	case OpIsSliceInBounds:
   205  		return rewriteValueMIPS_OpIsSliceInBounds(v)
   206  	case OpLeq16:
   207  		return rewriteValueMIPS_OpLeq16(v)
   208  	case OpLeq16U:
   209  		return rewriteValueMIPS_OpLeq16U(v)
   210  	case OpLeq32:
   211  		return rewriteValueMIPS_OpLeq32(v)
   212  	case OpLeq32F:
   213  		return rewriteValueMIPS_OpLeq32F(v)
   214  	case OpLeq32U:
   215  		return rewriteValueMIPS_OpLeq32U(v)
   216  	case OpLeq64F:
   217  		return rewriteValueMIPS_OpLeq64F(v)
   218  	case OpLeq8:
   219  		return rewriteValueMIPS_OpLeq8(v)
   220  	case OpLeq8U:
   221  		return rewriteValueMIPS_OpLeq8U(v)
   222  	case OpLess16:
   223  		return rewriteValueMIPS_OpLess16(v)
   224  	case OpLess16U:
   225  		return rewriteValueMIPS_OpLess16U(v)
   226  	case OpLess32:
   227  		return rewriteValueMIPS_OpLess32(v)
   228  	case OpLess32F:
   229  		return rewriteValueMIPS_OpLess32F(v)
   230  	case OpLess32U:
   231  		return rewriteValueMIPS_OpLess32U(v)
   232  	case OpLess64F:
   233  		return rewriteValueMIPS_OpLess64F(v)
   234  	case OpLess8:
   235  		return rewriteValueMIPS_OpLess8(v)
   236  	case OpLess8U:
   237  		return rewriteValueMIPS_OpLess8U(v)
   238  	case OpLoad:
   239  		return rewriteValueMIPS_OpLoad(v)
   240  	case OpLocalAddr:
   241  		return rewriteValueMIPS_OpLocalAddr(v)
   242  	case OpLsh16x16:
   243  		return rewriteValueMIPS_OpLsh16x16(v)
   244  	case OpLsh16x32:
   245  		return rewriteValueMIPS_OpLsh16x32(v)
   246  	case OpLsh16x64:
   247  		return rewriteValueMIPS_OpLsh16x64(v)
   248  	case OpLsh16x8:
   249  		return rewriteValueMIPS_OpLsh16x8(v)
   250  	case OpLsh32x16:
   251  		return rewriteValueMIPS_OpLsh32x16(v)
   252  	case OpLsh32x32:
   253  		return rewriteValueMIPS_OpLsh32x32(v)
   254  	case OpLsh32x64:
   255  		return rewriteValueMIPS_OpLsh32x64(v)
   256  	case OpLsh32x8:
   257  		return rewriteValueMIPS_OpLsh32x8(v)
   258  	case OpLsh8x16:
   259  		return rewriteValueMIPS_OpLsh8x16(v)
   260  	case OpLsh8x32:
   261  		return rewriteValueMIPS_OpLsh8x32(v)
   262  	case OpLsh8x64:
   263  		return rewriteValueMIPS_OpLsh8x64(v)
   264  	case OpLsh8x8:
   265  		return rewriteValueMIPS_OpLsh8x8(v)
   266  	case OpMIPSADD:
   267  		return rewriteValueMIPS_OpMIPSADD(v)
   268  	case OpMIPSADDconst:
   269  		return rewriteValueMIPS_OpMIPSADDconst(v)
   270  	case OpMIPSAND:
   271  		return rewriteValueMIPS_OpMIPSAND(v)
   272  	case OpMIPSANDconst:
   273  		return rewriteValueMIPS_OpMIPSANDconst(v)
   274  	case OpMIPSCMOVZ:
   275  		return rewriteValueMIPS_OpMIPSCMOVZ(v)
   276  	case OpMIPSCMOVZzero:
   277  		return rewriteValueMIPS_OpMIPSCMOVZzero(v)
   278  	case OpMIPSLoweredAtomicAdd:
   279  		return rewriteValueMIPS_OpMIPSLoweredAtomicAdd(v)
   280  	case OpMIPSLoweredAtomicStore32:
   281  		return rewriteValueMIPS_OpMIPSLoweredAtomicStore32(v)
   282  	case OpMIPSLoweredPanicBoundsRC:
   283  		return rewriteValueMIPS_OpMIPSLoweredPanicBoundsRC(v)
   284  	case OpMIPSLoweredPanicBoundsRR:
   285  		return rewriteValueMIPS_OpMIPSLoweredPanicBoundsRR(v)
   286  	case OpMIPSLoweredPanicExtendRC:
   287  		return rewriteValueMIPS_OpMIPSLoweredPanicExtendRC(v)
   288  	case OpMIPSLoweredPanicExtendRR:
   289  		return rewriteValueMIPS_OpMIPSLoweredPanicExtendRR(v)
   290  	case OpMIPSMOVBUload:
   291  		return rewriteValueMIPS_OpMIPSMOVBUload(v)
   292  	case OpMIPSMOVBUreg:
   293  		return rewriteValueMIPS_OpMIPSMOVBUreg(v)
   294  	case OpMIPSMOVBload:
   295  		return rewriteValueMIPS_OpMIPSMOVBload(v)
   296  	case OpMIPSMOVBreg:
   297  		return rewriteValueMIPS_OpMIPSMOVBreg(v)
   298  	case OpMIPSMOVBstore:
   299  		return rewriteValueMIPS_OpMIPSMOVBstore(v)
   300  	case OpMIPSMOVBstorezero:
   301  		return rewriteValueMIPS_OpMIPSMOVBstorezero(v)
   302  	case OpMIPSMOVDload:
   303  		return rewriteValueMIPS_OpMIPSMOVDload(v)
   304  	case OpMIPSMOVDstore:
   305  		return rewriteValueMIPS_OpMIPSMOVDstore(v)
   306  	case OpMIPSMOVFload:
   307  		return rewriteValueMIPS_OpMIPSMOVFload(v)
   308  	case OpMIPSMOVFstore:
   309  		return rewriteValueMIPS_OpMIPSMOVFstore(v)
   310  	case OpMIPSMOVHUload:
   311  		return rewriteValueMIPS_OpMIPSMOVHUload(v)
   312  	case OpMIPSMOVHUreg:
   313  		return rewriteValueMIPS_OpMIPSMOVHUreg(v)
   314  	case OpMIPSMOVHload:
   315  		return rewriteValueMIPS_OpMIPSMOVHload(v)
   316  	case OpMIPSMOVHreg:
   317  		return rewriteValueMIPS_OpMIPSMOVHreg(v)
   318  	case OpMIPSMOVHstore:
   319  		return rewriteValueMIPS_OpMIPSMOVHstore(v)
   320  	case OpMIPSMOVHstorezero:
   321  		return rewriteValueMIPS_OpMIPSMOVHstorezero(v)
   322  	case OpMIPSMOVWload:
   323  		return rewriteValueMIPS_OpMIPSMOVWload(v)
   324  	case OpMIPSMOVWnop:
   325  		return rewriteValueMIPS_OpMIPSMOVWnop(v)
   326  	case OpMIPSMOVWreg:
   327  		return rewriteValueMIPS_OpMIPSMOVWreg(v)
   328  	case OpMIPSMOVWstore:
   329  		return rewriteValueMIPS_OpMIPSMOVWstore(v)
   330  	case OpMIPSMOVWstorezero:
   331  		return rewriteValueMIPS_OpMIPSMOVWstorezero(v)
   332  	case OpMIPSMUL:
   333  		return rewriteValueMIPS_OpMIPSMUL(v)
   334  	case OpMIPSNEG:
   335  		return rewriteValueMIPS_OpMIPSNEG(v)
   336  	case OpMIPSOR:
   337  		return rewriteValueMIPS_OpMIPSOR(v)
   338  	case OpMIPSORconst:
   339  		return rewriteValueMIPS_OpMIPSORconst(v)
   340  	case OpMIPSSGT:
   341  		return rewriteValueMIPS_OpMIPSSGT(v)
   342  	case OpMIPSSGTU:
   343  		return rewriteValueMIPS_OpMIPSSGTU(v)
   344  	case OpMIPSSGTUconst:
   345  		return rewriteValueMIPS_OpMIPSSGTUconst(v)
   346  	case OpMIPSSGTUzero:
   347  		return rewriteValueMIPS_OpMIPSSGTUzero(v)
   348  	case OpMIPSSGTconst:
   349  		return rewriteValueMIPS_OpMIPSSGTconst(v)
   350  	case OpMIPSSGTzero:
   351  		return rewriteValueMIPS_OpMIPSSGTzero(v)
   352  	case OpMIPSSLL:
   353  		return rewriteValueMIPS_OpMIPSSLL(v)
   354  	case OpMIPSSLLconst:
   355  		return rewriteValueMIPS_OpMIPSSLLconst(v)
   356  	case OpMIPSSRA:
   357  		return rewriteValueMIPS_OpMIPSSRA(v)
   358  	case OpMIPSSRAconst:
   359  		return rewriteValueMIPS_OpMIPSSRAconst(v)
   360  	case OpMIPSSRL:
   361  		return rewriteValueMIPS_OpMIPSSRL(v)
   362  	case OpMIPSSRLconst:
   363  		return rewriteValueMIPS_OpMIPSSRLconst(v)
   364  	case OpMIPSSUB:
   365  		return rewriteValueMIPS_OpMIPSSUB(v)
   366  	case OpMIPSSUBconst:
   367  		return rewriteValueMIPS_OpMIPSSUBconst(v)
   368  	case OpMIPSXOR:
   369  		return rewriteValueMIPS_OpMIPSXOR(v)
   370  	case OpMIPSXORconst:
   371  		return rewriteValueMIPS_OpMIPSXORconst(v)
   372  	case OpMod16:
   373  		return rewriteValueMIPS_OpMod16(v)
   374  	case OpMod16u:
   375  		return rewriteValueMIPS_OpMod16u(v)
   376  	case OpMod32:
   377  		return rewriteValueMIPS_OpMod32(v)
   378  	case OpMod32u:
   379  		return rewriteValueMIPS_OpMod32u(v)
   380  	case OpMod8:
   381  		return rewriteValueMIPS_OpMod8(v)
   382  	case OpMod8u:
   383  		return rewriteValueMIPS_OpMod8u(v)
   384  	case OpMove:
   385  		return rewriteValueMIPS_OpMove(v)
   386  	case OpMul16:
   387  		v.Op = OpMIPSMUL
   388  		return true
   389  	case OpMul32:
   390  		v.Op = OpMIPSMUL
   391  		return true
   392  	case OpMul32F:
   393  		v.Op = OpMIPSMULF
   394  		return true
   395  	case OpMul32uhilo:
   396  		v.Op = OpMIPSMULTU
   397  		return true
   398  	case OpMul64F:
   399  		v.Op = OpMIPSMULD
   400  		return true
   401  	case OpMul8:
   402  		v.Op = OpMIPSMUL
   403  		return true
   404  	case OpNeg16:
   405  		v.Op = OpMIPSNEG
   406  		return true
   407  	case OpNeg32:
   408  		v.Op = OpMIPSNEG
   409  		return true
   410  	case OpNeg32F:
   411  		v.Op = OpMIPSNEGF
   412  		return true
   413  	case OpNeg64F:
   414  		v.Op = OpMIPSNEGD
   415  		return true
   416  	case OpNeg8:
   417  		v.Op = OpMIPSNEG
   418  		return true
   419  	case OpNeq16:
   420  		return rewriteValueMIPS_OpNeq16(v)
   421  	case OpNeq32:
   422  		return rewriteValueMIPS_OpNeq32(v)
   423  	case OpNeq32F:
   424  		return rewriteValueMIPS_OpNeq32F(v)
   425  	case OpNeq64F:
   426  		return rewriteValueMIPS_OpNeq64F(v)
   427  	case OpNeq8:
   428  		return rewriteValueMIPS_OpNeq8(v)
   429  	case OpNeqB:
   430  		v.Op = OpMIPSXOR
   431  		return true
   432  	case OpNeqPtr:
   433  		return rewriteValueMIPS_OpNeqPtr(v)
   434  	case OpNilCheck:
   435  		v.Op = OpMIPSLoweredNilCheck
   436  		return true
   437  	case OpNot:
   438  		return rewriteValueMIPS_OpNot(v)
   439  	case OpOffPtr:
   440  		return rewriteValueMIPS_OpOffPtr(v)
   441  	case OpOr16:
   442  		v.Op = OpMIPSOR
   443  		return true
   444  	case OpOr32:
   445  		v.Op = OpMIPSOR
   446  		return true
   447  	case OpOr8:
   448  		v.Op = OpMIPSOR
   449  		return true
   450  	case OpOrB:
   451  		v.Op = OpMIPSOR
   452  		return true
   453  	case OpPanicBounds:
   454  		v.Op = OpMIPSLoweredPanicBoundsRR
   455  		return true
   456  	case OpPanicExtend:
   457  		v.Op = OpMIPSLoweredPanicExtendRR
   458  		return true
   459  	case OpPubBarrier:
   460  		v.Op = OpMIPSLoweredPubBarrier
   461  		return true
   462  	case OpRotateLeft16:
   463  		return rewriteValueMIPS_OpRotateLeft16(v)
   464  	case OpRotateLeft32:
   465  		return rewriteValueMIPS_OpRotateLeft32(v)
   466  	case OpRotateLeft64:
   467  		return rewriteValueMIPS_OpRotateLeft64(v)
   468  	case OpRotateLeft8:
   469  		return rewriteValueMIPS_OpRotateLeft8(v)
   470  	case OpRound32F:
   471  		v.Op = OpCopy
   472  		return true
   473  	case OpRound64F:
   474  		v.Op = OpCopy
   475  		return true
   476  	case OpRsh16Ux16:
   477  		return rewriteValueMIPS_OpRsh16Ux16(v)
   478  	case OpRsh16Ux32:
   479  		return rewriteValueMIPS_OpRsh16Ux32(v)
   480  	case OpRsh16Ux64:
   481  		return rewriteValueMIPS_OpRsh16Ux64(v)
   482  	case OpRsh16Ux8:
   483  		return rewriteValueMIPS_OpRsh16Ux8(v)
   484  	case OpRsh16x16:
   485  		return rewriteValueMIPS_OpRsh16x16(v)
   486  	case OpRsh16x32:
   487  		return rewriteValueMIPS_OpRsh16x32(v)
   488  	case OpRsh16x64:
   489  		return rewriteValueMIPS_OpRsh16x64(v)
   490  	case OpRsh16x8:
   491  		return rewriteValueMIPS_OpRsh16x8(v)
   492  	case OpRsh32Ux16:
   493  		return rewriteValueMIPS_OpRsh32Ux16(v)
   494  	case OpRsh32Ux32:
   495  		return rewriteValueMIPS_OpRsh32Ux32(v)
   496  	case OpRsh32Ux64:
   497  		return rewriteValueMIPS_OpRsh32Ux64(v)
   498  	case OpRsh32Ux8:
   499  		return rewriteValueMIPS_OpRsh32Ux8(v)
   500  	case OpRsh32x16:
   501  		return rewriteValueMIPS_OpRsh32x16(v)
   502  	case OpRsh32x32:
   503  		return rewriteValueMIPS_OpRsh32x32(v)
   504  	case OpRsh32x64:
   505  		return rewriteValueMIPS_OpRsh32x64(v)
   506  	case OpRsh32x8:
   507  		return rewriteValueMIPS_OpRsh32x8(v)
   508  	case OpRsh8Ux16:
   509  		return rewriteValueMIPS_OpRsh8Ux16(v)
   510  	case OpRsh8Ux32:
   511  		return rewriteValueMIPS_OpRsh8Ux32(v)
   512  	case OpRsh8Ux64:
   513  		return rewriteValueMIPS_OpRsh8Ux64(v)
   514  	case OpRsh8Ux8:
   515  		return rewriteValueMIPS_OpRsh8Ux8(v)
   516  	case OpRsh8x16:
   517  		return rewriteValueMIPS_OpRsh8x16(v)
   518  	case OpRsh8x32:
   519  		return rewriteValueMIPS_OpRsh8x32(v)
   520  	case OpRsh8x64:
   521  		return rewriteValueMIPS_OpRsh8x64(v)
   522  	case OpRsh8x8:
   523  		return rewriteValueMIPS_OpRsh8x8(v)
   524  	case OpSelect0:
   525  		return rewriteValueMIPS_OpSelect0(v)
   526  	case OpSelect1:
   527  		return rewriteValueMIPS_OpSelect1(v)
   528  	case OpSignExt16to32:
   529  		v.Op = OpMIPSMOVHreg
   530  		return true
   531  	case OpSignExt8to16:
   532  		v.Op = OpMIPSMOVBreg
   533  		return true
   534  	case OpSignExt8to32:
   535  		v.Op = OpMIPSMOVBreg
   536  		return true
   537  	case OpSignmask:
   538  		return rewriteValueMIPS_OpSignmask(v)
   539  	case OpSlicemask:
   540  		return rewriteValueMIPS_OpSlicemask(v)
   541  	case OpSqrt:
   542  		v.Op = OpMIPSSQRTD
   543  		return true
   544  	case OpSqrt32:
   545  		v.Op = OpMIPSSQRTF
   546  		return true
   547  	case OpStaticCall:
   548  		v.Op = OpMIPSCALLstatic
   549  		return true
   550  	case OpStore:
   551  		return rewriteValueMIPS_OpStore(v)
   552  	case OpSub16:
   553  		v.Op = OpMIPSSUB
   554  		return true
   555  	case OpSub32:
   556  		v.Op = OpMIPSSUB
   557  		return true
   558  	case OpSub32F:
   559  		v.Op = OpMIPSSUBF
   560  		return true
   561  	case OpSub32withcarry:
   562  		return rewriteValueMIPS_OpSub32withcarry(v)
   563  	case OpSub64F:
   564  		v.Op = OpMIPSSUBD
   565  		return true
   566  	case OpSub8:
   567  		v.Op = OpMIPSSUB
   568  		return true
   569  	case OpSubPtr:
   570  		v.Op = OpMIPSSUB
   571  		return true
   572  	case OpTailCall:
   573  		v.Op = OpMIPSCALLtail
   574  		return true
   575  	case OpTailCallInter:
   576  		v.Op = OpMIPSCALLtailinter
   577  		return true
   578  	case OpTrunc16to8:
   579  		v.Op = OpCopy
   580  		return true
   581  	case OpTrunc32to16:
   582  		v.Op = OpCopy
   583  		return true
   584  	case OpTrunc32to8:
   585  		v.Op = OpCopy
   586  		return true
   587  	case OpWB:
   588  		v.Op = OpMIPSLoweredWB
   589  		return true
   590  	case OpXor16:
   591  		v.Op = OpMIPSXOR
   592  		return true
   593  	case OpXor32:
   594  		v.Op = OpMIPSXOR
   595  		return true
   596  	case OpXor8:
   597  		v.Op = OpMIPSXOR
   598  		return true
   599  	case OpZero:
   600  		return rewriteValueMIPS_OpZero(v)
   601  	case OpZeroExt16to32:
   602  		v.Op = OpMIPSMOVHUreg
   603  		return true
   604  	case OpZeroExt8to16:
   605  		v.Op = OpMIPSMOVBUreg
   606  		return true
   607  	case OpZeroExt8to32:
   608  		v.Op = OpMIPSMOVBUreg
   609  		return true
   610  	case OpZeromask:
   611  		return rewriteValueMIPS_OpZeromask(v)
   612  	}
   613  	return false
   614  }
   615  func rewriteValueMIPS_OpAdd32withcarry(v *Value) bool {
   616  	v_2 := v.Args[2]
   617  	v_1 := v.Args[1]
   618  	v_0 := v.Args[0]
   619  	b := v.Block
   620  	// match: (Add32withcarry <t> x y c)
   621  	// result: (ADD c (ADD <t> x y))
   622  	for {
   623  		t := v.Type
   624  		x := v_0
   625  		y := v_1
   626  		c := v_2
   627  		v.reset(OpMIPSADD)
   628  		v0 := b.NewValue0(v.Pos, OpMIPSADD, t)
   629  		v0.AddArg2(x, y)
   630  		v.AddArg2(c, v0)
   631  		return true
   632  	}
   633  }
   634  func rewriteValueMIPS_OpAddr(v *Value) bool {
   635  	v_0 := v.Args[0]
   636  	// match: (Addr {sym} base)
   637  	// result: (MOVWaddr {sym} base)
   638  	for {
   639  		sym := auxToSym(v.Aux)
   640  		base := v_0
   641  		v.reset(OpMIPSMOVWaddr)
   642  		v.Aux = symToAux(sym)
   643  		v.AddArg(base)
   644  		return true
   645  	}
   646  }
   647  func rewriteValueMIPS_OpAtomicAnd8(v *Value) bool {
   648  	v_2 := v.Args[2]
   649  	v_1 := v.Args[1]
   650  	v_0 := v.Args[0]
   651  	b := v.Block
   652  	config := b.Func.Config
   653  	typ := &b.Func.Config.Types
   654  	// match: (AtomicAnd8 ptr val mem)
   655  	// cond: !config.BigEndian
   656  	// result: (LoweredAtomicAnd (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (OR <typ.UInt32> (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] ptr))) (NOR (MOVWconst [0]) <typ.UInt32> (SLL <typ.UInt32> (MOVWconst [0xff]) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] ptr))))) mem)
   657  	for {
   658  		ptr := v_0
   659  		val := v_1
   660  		mem := v_2
   661  		if !(!config.BigEndian) {
   662  			break
   663  		}
   664  		v.reset(OpMIPSLoweredAtomicAnd)
   665  		v0 := b.NewValue0(v.Pos, OpMIPSAND, typ.UInt32Ptr)
   666  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   667  		v1.AuxInt = int32ToAuxInt(^3)
   668  		v0.AddArg2(v1, ptr)
   669  		v2 := b.NewValue0(v.Pos, OpMIPSOR, typ.UInt32)
   670  		v3 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   671  		v4 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   672  		v4.AddArg(val)
   673  		v5 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
   674  		v5.AuxInt = int32ToAuxInt(3)
   675  		v6 := b.NewValue0(v.Pos, OpMIPSANDconst, typ.UInt32)
   676  		v6.AuxInt = int32ToAuxInt(3)
   677  		v6.AddArg(ptr)
   678  		v5.AddArg(v6)
   679  		v3.AddArg2(v4, v5)
   680  		v7 := b.NewValue0(v.Pos, OpMIPSNOR, typ.UInt32)
   681  		v8 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   682  		v8.AuxInt = int32ToAuxInt(0)
   683  		v9 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   684  		v10 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   685  		v10.AuxInt = int32ToAuxInt(0xff)
   686  		v9.AddArg2(v10, v5)
   687  		v7.AddArg2(v8, v9)
   688  		v2.AddArg2(v3, v7)
   689  		v.AddArg3(v0, v2, mem)
   690  		return true
   691  	}
   692  	// match: (AtomicAnd8 ptr val mem)
   693  	// cond: config.BigEndian
   694  	// result: (LoweredAtomicAnd (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (OR <typ.UInt32> (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] (XORconst <typ.UInt32> [3] ptr)))) (NOR (MOVWconst [0]) <typ.UInt32> (SLL <typ.UInt32> (MOVWconst [0xff]) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] (XORconst <typ.UInt32> [3] ptr)))))) mem)
   695  	for {
   696  		ptr := v_0
   697  		val := v_1
   698  		mem := v_2
   699  		if !(config.BigEndian) {
   700  			break
   701  		}
   702  		v.reset(OpMIPSLoweredAtomicAnd)
   703  		v0 := b.NewValue0(v.Pos, OpMIPSAND, typ.UInt32Ptr)
   704  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   705  		v1.AuxInt = int32ToAuxInt(^3)
   706  		v0.AddArg2(v1, ptr)
   707  		v2 := b.NewValue0(v.Pos, OpMIPSOR, typ.UInt32)
   708  		v3 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   709  		v4 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   710  		v4.AddArg(val)
   711  		v5 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
   712  		v5.AuxInt = int32ToAuxInt(3)
   713  		v6 := b.NewValue0(v.Pos, OpMIPSANDconst, typ.UInt32)
   714  		v6.AuxInt = int32ToAuxInt(3)
   715  		v7 := b.NewValue0(v.Pos, OpMIPSXORconst, typ.UInt32)
   716  		v7.AuxInt = int32ToAuxInt(3)
   717  		v7.AddArg(ptr)
   718  		v6.AddArg(v7)
   719  		v5.AddArg(v6)
   720  		v3.AddArg2(v4, v5)
   721  		v8 := b.NewValue0(v.Pos, OpMIPSNOR, typ.UInt32)
   722  		v9 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   723  		v9.AuxInt = int32ToAuxInt(0)
   724  		v10 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   725  		v11 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   726  		v11.AuxInt = int32ToAuxInt(0xff)
   727  		v10.AddArg2(v11, v5)
   728  		v8.AddArg2(v9, v10)
   729  		v2.AddArg2(v3, v8)
   730  		v.AddArg3(v0, v2, mem)
   731  		return true
   732  	}
   733  	return false
   734  }
   735  func rewriteValueMIPS_OpAtomicOr8(v *Value) bool {
   736  	v_2 := v.Args[2]
   737  	v_1 := v.Args[1]
   738  	v_0 := v.Args[0]
   739  	b := v.Block
   740  	config := b.Func.Config
   741  	typ := &b.Func.Config.Types
   742  	// match: (AtomicOr8 ptr val mem)
   743  	// cond: !config.BigEndian
   744  	// result: (LoweredAtomicOr (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] ptr))) mem)
   745  	for {
   746  		ptr := v_0
   747  		val := v_1
   748  		mem := v_2
   749  		if !(!config.BigEndian) {
   750  			break
   751  		}
   752  		v.reset(OpMIPSLoweredAtomicOr)
   753  		v0 := b.NewValue0(v.Pos, OpMIPSAND, typ.UInt32Ptr)
   754  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   755  		v1.AuxInt = int32ToAuxInt(^3)
   756  		v0.AddArg2(v1, ptr)
   757  		v2 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   758  		v3 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   759  		v3.AddArg(val)
   760  		v4 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
   761  		v4.AuxInt = int32ToAuxInt(3)
   762  		v5 := b.NewValue0(v.Pos, OpMIPSANDconst, typ.UInt32)
   763  		v5.AuxInt = int32ToAuxInt(3)
   764  		v5.AddArg(ptr)
   765  		v4.AddArg(v5)
   766  		v2.AddArg2(v3, v4)
   767  		v.AddArg3(v0, v2, mem)
   768  		return true
   769  	}
   770  	// match: (AtomicOr8 ptr val mem)
   771  	// cond: config.BigEndian
   772  	// result: (LoweredAtomicOr (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] (XORconst <typ.UInt32> [3] ptr)))) mem)
   773  	for {
   774  		ptr := v_0
   775  		val := v_1
   776  		mem := v_2
   777  		if !(config.BigEndian) {
   778  			break
   779  		}
   780  		v.reset(OpMIPSLoweredAtomicOr)
   781  		v0 := b.NewValue0(v.Pos, OpMIPSAND, typ.UInt32Ptr)
   782  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   783  		v1.AuxInt = int32ToAuxInt(^3)
   784  		v0.AddArg2(v1, ptr)
   785  		v2 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   786  		v3 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   787  		v3.AddArg(val)
   788  		v4 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
   789  		v4.AuxInt = int32ToAuxInt(3)
   790  		v5 := b.NewValue0(v.Pos, OpMIPSANDconst, typ.UInt32)
   791  		v5.AuxInt = int32ToAuxInt(3)
   792  		v6 := b.NewValue0(v.Pos, OpMIPSXORconst, typ.UInt32)
   793  		v6.AuxInt = int32ToAuxInt(3)
   794  		v6.AddArg(ptr)
   795  		v5.AddArg(v6)
   796  		v4.AddArg(v5)
   797  		v2.AddArg2(v3, v4)
   798  		v.AddArg3(v0, v2, mem)
   799  		return true
   800  	}
   801  	return false
   802  }
   803  func rewriteValueMIPS_OpAvg32u(v *Value) bool {
   804  	v_1 := v.Args[1]
   805  	v_0 := v.Args[0]
   806  	b := v.Block
   807  	// match: (Avg32u <t> x y)
   808  	// result: (ADD (SRLconst <t> (SUB <t> x y) [1]) y)
   809  	for {
   810  		t := v.Type
   811  		x := v_0
   812  		y := v_1
   813  		v.reset(OpMIPSADD)
   814  		v0 := b.NewValue0(v.Pos, OpMIPSSRLconst, t)
   815  		v0.AuxInt = int32ToAuxInt(1)
   816  		v1 := b.NewValue0(v.Pos, OpMIPSSUB, t)
   817  		v1.AddArg2(x, y)
   818  		v0.AddArg(v1)
   819  		v.AddArg2(v0, y)
   820  		return true
   821  	}
   822  }
   823  func rewriteValueMIPS_OpBitLen16(v *Value) bool {
   824  	v_0 := v.Args[0]
   825  	b := v.Block
   826  	typ := &b.Func.Config.Types
   827  	// match: (BitLen16 x)
   828  	// result: (BitLen32 (ZeroExt16to32 x))
   829  	for {
   830  		x := v_0
   831  		v.reset(OpBitLen32)
   832  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
   833  		v0.AddArg(x)
   834  		v.AddArg(v0)
   835  		return true
   836  	}
   837  }
   838  func rewriteValueMIPS_OpBitLen32(v *Value) bool {
   839  	v_0 := v.Args[0]
   840  	b := v.Block
   841  	typ := &b.Func.Config.Types
   842  	// match: (BitLen32 <t> x)
   843  	// result: (SUB (MOVWconst [32]) (CLZ <t> x))
   844  	for {
   845  		t := v.Type
   846  		x := v_0
   847  		v.reset(OpMIPSSUB)
   848  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   849  		v0.AuxInt = int32ToAuxInt(32)
   850  		v1 := b.NewValue0(v.Pos, OpMIPSCLZ, t)
   851  		v1.AddArg(x)
   852  		v.AddArg2(v0, v1)
   853  		return true
   854  	}
   855  }
   856  func rewriteValueMIPS_OpBitLen8(v *Value) bool {
   857  	v_0 := v.Args[0]
   858  	b := v.Block
   859  	typ := &b.Func.Config.Types
   860  	// match: (BitLen8 x)
   861  	// result: (BitLen32 (ZeroExt8to32 x))
   862  	for {
   863  		x := v_0
   864  		v.reset(OpBitLen32)
   865  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   866  		v0.AddArg(x)
   867  		v.AddArg(v0)
   868  		return true
   869  	}
   870  }
   871  func rewriteValueMIPS_OpCom16(v *Value) bool {
   872  	v_0 := v.Args[0]
   873  	b := v.Block
   874  	typ := &b.Func.Config.Types
   875  	// match: (Com16 x)
   876  	// result: (NOR (MOVWconst [0]) x)
   877  	for {
   878  		x := v_0
   879  		v.reset(OpMIPSNOR)
   880  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   881  		v0.AuxInt = int32ToAuxInt(0)
   882  		v.AddArg2(v0, x)
   883  		return true
   884  	}
   885  }
   886  func rewriteValueMIPS_OpCom32(v *Value) bool {
   887  	v_0 := v.Args[0]
   888  	b := v.Block
   889  	typ := &b.Func.Config.Types
   890  	// match: (Com32 x)
   891  	// result: (NOR (MOVWconst [0]) x)
   892  	for {
   893  		x := v_0
   894  		v.reset(OpMIPSNOR)
   895  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   896  		v0.AuxInt = int32ToAuxInt(0)
   897  		v.AddArg2(v0, x)
   898  		return true
   899  	}
   900  }
   901  func rewriteValueMIPS_OpCom8(v *Value) bool {
   902  	v_0 := v.Args[0]
   903  	b := v.Block
   904  	typ := &b.Func.Config.Types
   905  	// match: (Com8 x)
   906  	// result: (NOR (MOVWconst [0]) x)
   907  	for {
   908  		x := v_0
   909  		v.reset(OpMIPSNOR)
   910  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   911  		v0.AuxInt = int32ToAuxInt(0)
   912  		v.AddArg2(v0, x)
   913  		return true
   914  	}
   915  }
   916  func rewriteValueMIPS_OpConst16(v *Value) bool {
   917  	// match: (Const16 [val])
   918  	// result: (MOVWconst [int32(val)])
   919  	for {
   920  		val := auxIntToInt16(v.AuxInt)
   921  		v.reset(OpMIPSMOVWconst)
   922  		v.AuxInt = int32ToAuxInt(int32(val))
   923  		return true
   924  	}
   925  }
   926  func rewriteValueMIPS_OpConst32(v *Value) bool {
   927  	// match: (Const32 [val])
   928  	// result: (MOVWconst [int32(val)])
   929  	for {
   930  		val := auxIntToInt32(v.AuxInt)
   931  		v.reset(OpMIPSMOVWconst)
   932  		v.AuxInt = int32ToAuxInt(int32(val))
   933  		return true
   934  	}
   935  }
   936  func rewriteValueMIPS_OpConst8(v *Value) bool {
   937  	// match: (Const8 [val])
   938  	// result: (MOVWconst [int32(val)])
   939  	for {
   940  		val := auxIntToInt8(v.AuxInt)
   941  		v.reset(OpMIPSMOVWconst)
   942  		v.AuxInt = int32ToAuxInt(int32(val))
   943  		return true
   944  	}
   945  }
   946  func rewriteValueMIPS_OpConstBool(v *Value) bool {
   947  	// match: (ConstBool [t])
   948  	// result: (MOVWconst [b2i32(t)])
   949  	for {
   950  		t := auxIntToBool(v.AuxInt)
   951  		v.reset(OpMIPSMOVWconst)
   952  		v.AuxInt = int32ToAuxInt(b2i32(t))
   953  		return true
   954  	}
   955  }
   956  func rewriteValueMIPS_OpConstNil(v *Value) bool {
   957  	// match: (ConstNil)
   958  	// result: (MOVWconst [0])
   959  	for {
   960  		v.reset(OpMIPSMOVWconst)
   961  		v.AuxInt = int32ToAuxInt(0)
   962  		return true
   963  	}
   964  }
   965  func rewriteValueMIPS_OpCtz16(v *Value) bool {
   966  	v_0 := v.Args[0]
   967  	b := v.Block
   968  	typ := &b.Func.Config.Types
   969  	// match: (Ctz16 x)
   970  	// result: (Ctz32 (Or32 <typ.UInt32> x (MOVWconst [1<<16])))
   971  	for {
   972  		x := v_0
   973  		v.reset(OpCtz32)
   974  		v0 := b.NewValue0(v.Pos, OpOr32, typ.UInt32)
   975  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   976  		v1.AuxInt = int32ToAuxInt(1 << 16)
   977  		v0.AddArg2(x, v1)
   978  		v.AddArg(v0)
   979  		return true
   980  	}
   981  }
   982  func rewriteValueMIPS_OpCtz32(v *Value) bool {
   983  	v_0 := v.Args[0]
   984  	b := v.Block
   985  	typ := &b.Func.Config.Types
   986  	// match: (Ctz32 <t> x)
   987  	// result: (SUB (MOVWconst [32]) (CLZ <t> (SUBconst <t> [1] (AND <t> x (NEG <t> x)))))
   988  	for {
   989  		t := v.Type
   990  		x := v_0
   991  		v.reset(OpMIPSSUB)
   992  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   993  		v0.AuxInt = int32ToAuxInt(32)
   994  		v1 := b.NewValue0(v.Pos, OpMIPSCLZ, t)
   995  		v2 := b.NewValue0(v.Pos, OpMIPSSUBconst, t)
   996  		v2.AuxInt = int32ToAuxInt(1)
   997  		v3 := b.NewValue0(v.Pos, OpMIPSAND, t)
   998  		v4 := b.NewValue0(v.Pos, OpMIPSNEG, t)
   999  		v4.AddArg(x)
  1000  		v3.AddArg2(x, v4)
  1001  		v2.AddArg(v3)
  1002  		v1.AddArg(v2)
  1003  		v.AddArg2(v0, v1)
  1004  		return true
  1005  	}
  1006  }
  1007  func rewriteValueMIPS_OpCtz8(v *Value) bool {
  1008  	v_0 := v.Args[0]
  1009  	b := v.Block
  1010  	typ := &b.Func.Config.Types
  1011  	// match: (Ctz8 x)
  1012  	// result: (Ctz32 (Or32 <typ.UInt32> x (MOVWconst [1<<8])))
  1013  	for {
  1014  		x := v_0
  1015  		v.reset(OpCtz32)
  1016  		v0 := b.NewValue0(v.Pos, OpOr32, typ.UInt32)
  1017  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1018  		v1.AuxInt = int32ToAuxInt(1 << 8)
  1019  		v0.AddArg2(x, v1)
  1020  		v.AddArg(v0)
  1021  		return true
  1022  	}
  1023  }
  1024  func rewriteValueMIPS_OpDiv16(v *Value) bool {
  1025  	v_1 := v.Args[1]
  1026  	v_0 := v.Args[0]
  1027  	b := v.Block
  1028  	typ := &b.Func.Config.Types
  1029  	// match: (Div16 x y)
  1030  	// result: (Select1 (DIV (SignExt16to32 x) (SignExt16to32 y)))
  1031  	for {
  1032  		x := v_0
  1033  		y := v_1
  1034  		v.reset(OpSelect1)
  1035  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  1036  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1037  		v1.AddArg(x)
  1038  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1039  		v2.AddArg(y)
  1040  		v0.AddArg2(v1, v2)
  1041  		v.AddArg(v0)
  1042  		return true
  1043  	}
  1044  }
  1045  func rewriteValueMIPS_OpDiv16u(v *Value) bool {
  1046  	v_1 := v.Args[1]
  1047  	v_0 := v.Args[0]
  1048  	b := v.Block
  1049  	typ := &b.Func.Config.Types
  1050  	// match: (Div16u x y)
  1051  	// result: (Select1 (DIVU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  1052  	for {
  1053  		x := v_0
  1054  		y := v_1
  1055  		v.reset(OpSelect1)
  1056  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  1057  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1058  		v1.AddArg(x)
  1059  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1060  		v2.AddArg(y)
  1061  		v0.AddArg2(v1, v2)
  1062  		v.AddArg(v0)
  1063  		return true
  1064  	}
  1065  }
  1066  func rewriteValueMIPS_OpDiv32(v *Value) bool {
  1067  	v_1 := v.Args[1]
  1068  	v_0 := v.Args[0]
  1069  	b := v.Block
  1070  	typ := &b.Func.Config.Types
  1071  	// match: (Div32 x y)
  1072  	// result: (Select1 (DIV x y))
  1073  	for {
  1074  		x := v_0
  1075  		y := v_1
  1076  		v.reset(OpSelect1)
  1077  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  1078  		v0.AddArg2(x, y)
  1079  		v.AddArg(v0)
  1080  		return true
  1081  	}
  1082  }
  1083  func rewriteValueMIPS_OpDiv32u(v *Value) bool {
  1084  	v_1 := v.Args[1]
  1085  	v_0 := v.Args[0]
  1086  	b := v.Block
  1087  	typ := &b.Func.Config.Types
  1088  	// match: (Div32u x y)
  1089  	// result: (Select1 (DIVU x y))
  1090  	for {
  1091  		x := v_0
  1092  		y := v_1
  1093  		v.reset(OpSelect1)
  1094  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  1095  		v0.AddArg2(x, y)
  1096  		v.AddArg(v0)
  1097  		return true
  1098  	}
  1099  }
  1100  func rewriteValueMIPS_OpDiv8(v *Value) bool {
  1101  	v_1 := v.Args[1]
  1102  	v_0 := v.Args[0]
  1103  	b := v.Block
  1104  	typ := &b.Func.Config.Types
  1105  	// match: (Div8 x y)
  1106  	// result: (Select1 (DIV (SignExt8to32 x) (SignExt8to32 y)))
  1107  	for {
  1108  		x := v_0
  1109  		y := v_1
  1110  		v.reset(OpSelect1)
  1111  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  1112  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1113  		v1.AddArg(x)
  1114  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1115  		v2.AddArg(y)
  1116  		v0.AddArg2(v1, v2)
  1117  		v.AddArg(v0)
  1118  		return true
  1119  	}
  1120  }
  1121  func rewriteValueMIPS_OpDiv8u(v *Value) bool {
  1122  	v_1 := v.Args[1]
  1123  	v_0 := v.Args[0]
  1124  	b := v.Block
  1125  	typ := &b.Func.Config.Types
  1126  	// match: (Div8u x y)
  1127  	// result: (Select1 (DIVU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  1128  	for {
  1129  		x := v_0
  1130  		y := v_1
  1131  		v.reset(OpSelect1)
  1132  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  1133  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1134  		v1.AddArg(x)
  1135  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1136  		v2.AddArg(y)
  1137  		v0.AddArg2(v1, v2)
  1138  		v.AddArg(v0)
  1139  		return true
  1140  	}
  1141  }
  1142  func rewriteValueMIPS_OpEq16(v *Value) bool {
  1143  	v_1 := v.Args[1]
  1144  	v_0 := v.Args[0]
  1145  	b := v.Block
  1146  	typ := &b.Func.Config.Types
  1147  	// match: (Eq16 x y)
  1148  	// result: (SGTUconst [1] (XOR (ZeroExt16to32 x) (ZeroExt16to32 y)))
  1149  	for {
  1150  		x := v_0
  1151  		y := v_1
  1152  		v.reset(OpMIPSSGTUconst)
  1153  		v.AuxInt = int32ToAuxInt(1)
  1154  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  1155  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1156  		v1.AddArg(x)
  1157  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1158  		v2.AddArg(y)
  1159  		v0.AddArg2(v1, v2)
  1160  		v.AddArg(v0)
  1161  		return true
  1162  	}
  1163  }
  1164  func rewriteValueMIPS_OpEq32(v *Value) bool {
  1165  	v_1 := v.Args[1]
  1166  	v_0 := v.Args[0]
  1167  	b := v.Block
  1168  	typ := &b.Func.Config.Types
  1169  	// match: (Eq32 x y)
  1170  	// result: (SGTUconst [1] (XOR x y))
  1171  	for {
  1172  		x := v_0
  1173  		y := v_1
  1174  		v.reset(OpMIPSSGTUconst)
  1175  		v.AuxInt = int32ToAuxInt(1)
  1176  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  1177  		v0.AddArg2(x, y)
  1178  		v.AddArg(v0)
  1179  		return true
  1180  	}
  1181  }
  1182  func rewriteValueMIPS_OpEq32F(v *Value) bool {
  1183  	v_1 := v.Args[1]
  1184  	v_0 := v.Args[0]
  1185  	b := v.Block
  1186  	// match: (Eq32F x y)
  1187  	// result: (FPFlagTrue (CMPEQF x y))
  1188  	for {
  1189  		x := v_0
  1190  		y := v_1
  1191  		v.reset(OpMIPSFPFlagTrue)
  1192  		v0 := b.NewValue0(v.Pos, OpMIPSCMPEQF, types.TypeFlags)
  1193  		v0.AddArg2(x, y)
  1194  		v.AddArg(v0)
  1195  		return true
  1196  	}
  1197  }
  1198  func rewriteValueMIPS_OpEq64F(v *Value) bool {
  1199  	v_1 := v.Args[1]
  1200  	v_0 := v.Args[0]
  1201  	b := v.Block
  1202  	// match: (Eq64F x y)
  1203  	// result: (FPFlagTrue (CMPEQD x y))
  1204  	for {
  1205  		x := v_0
  1206  		y := v_1
  1207  		v.reset(OpMIPSFPFlagTrue)
  1208  		v0 := b.NewValue0(v.Pos, OpMIPSCMPEQD, types.TypeFlags)
  1209  		v0.AddArg2(x, y)
  1210  		v.AddArg(v0)
  1211  		return true
  1212  	}
  1213  }
  1214  func rewriteValueMIPS_OpEq8(v *Value) bool {
  1215  	v_1 := v.Args[1]
  1216  	v_0 := v.Args[0]
  1217  	b := v.Block
  1218  	typ := &b.Func.Config.Types
  1219  	// match: (Eq8 x y)
  1220  	// result: (SGTUconst [1] (XOR (ZeroExt8to32 x) (ZeroExt8to32 y)))
  1221  	for {
  1222  		x := v_0
  1223  		y := v_1
  1224  		v.reset(OpMIPSSGTUconst)
  1225  		v.AuxInt = int32ToAuxInt(1)
  1226  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  1227  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1228  		v1.AddArg(x)
  1229  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1230  		v2.AddArg(y)
  1231  		v0.AddArg2(v1, v2)
  1232  		v.AddArg(v0)
  1233  		return true
  1234  	}
  1235  }
  1236  func rewriteValueMIPS_OpEqB(v *Value) bool {
  1237  	v_1 := v.Args[1]
  1238  	v_0 := v.Args[0]
  1239  	b := v.Block
  1240  	typ := &b.Func.Config.Types
  1241  	// match: (EqB x y)
  1242  	// result: (XORconst [1] (XOR <typ.Bool> x y))
  1243  	for {
  1244  		x := v_0
  1245  		y := v_1
  1246  		v.reset(OpMIPSXORconst)
  1247  		v.AuxInt = int32ToAuxInt(1)
  1248  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.Bool)
  1249  		v0.AddArg2(x, y)
  1250  		v.AddArg(v0)
  1251  		return true
  1252  	}
  1253  }
  1254  func rewriteValueMIPS_OpEqPtr(v *Value) bool {
  1255  	v_1 := v.Args[1]
  1256  	v_0 := v.Args[0]
  1257  	b := v.Block
  1258  	typ := &b.Func.Config.Types
  1259  	// match: (EqPtr x y)
  1260  	// result: (SGTUconst [1] (XOR x y))
  1261  	for {
  1262  		x := v_0
  1263  		y := v_1
  1264  		v.reset(OpMIPSSGTUconst)
  1265  		v.AuxInt = int32ToAuxInt(1)
  1266  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  1267  		v0.AddArg2(x, y)
  1268  		v.AddArg(v0)
  1269  		return true
  1270  	}
  1271  }
  1272  func rewriteValueMIPS_OpHmul32(v *Value) bool {
  1273  	v_1 := v.Args[1]
  1274  	v_0 := v.Args[0]
  1275  	b := v.Block
  1276  	typ := &b.Func.Config.Types
  1277  	// match: (Hmul32 x y)
  1278  	// result: (Select0 (MULT x y))
  1279  	for {
  1280  		x := v_0
  1281  		y := v_1
  1282  		v.reset(OpSelect0)
  1283  		v0 := b.NewValue0(v.Pos, OpMIPSMULT, types.NewTuple(typ.Int32, typ.Int32))
  1284  		v0.AddArg2(x, y)
  1285  		v.AddArg(v0)
  1286  		return true
  1287  	}
  1288  }
  1289  func rewriteValueMIPS_OpHmul32u(v *Value) bool {
  1290  	v_1 := v.Args[1]
  1291  	v_0 := v.Args[0]
  1292  	b := v.Block
  1293  	typ := &b.Func.Config.Types
  1294  	// match: (Hmul32u x y)
  1295  	// result: (Select0 (MULTU x y))
  1296  	for {
  1297  		x := v_0
  1298  		y := v_1
  1299  		v.reset(OpSelect0)
  1300  		v0 := b.NewValue0(v.Pos, OpMIPSMULTU, types.NewTuple(typ.UInt32, typ.UInt32))
  1301  		v0.AddArg2(x, y)
  1302  		v.AddArg(v0)
  1303  		return true
  1304  	}
  1305  }
  1306  func rewriteValueMIPS_OpIsInBounds(v *Value) bool {
  1307  	v_1 := v.Args[1]
  1308  	v_0 := v.Args[0]
  1309  	// match: (IsInBounds idx len)
  1310  	// result: (SGTU len idx)
  1311  	for {
  1312  		idx := v_0
  1313  		len := v_1
  1314  		v.reset(OpMIPSSGTU)
  1315  		v.AddArg2(len, idx)
  1316  		return true
  1317  	}
  1318  }
  1319  func rewriteValueMIPS_OpIsNonNil(v *Value) bool {
  1320  	v_0 := v.Args[0]
  1321  	b := v.Block
  1322  	typ := &b.Func.Config.Types
  1323  	// match: (IsNonNil ptr)
  1324  	// result: (SGTU ptr (MOVWconst [0]))
  1325  	for {
  1326  		ptr := v_0
  1327  		v.reset(OpMIPSSGTU)
  1328  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1329  		v0.AuxInt = int32ToAuxInt(0)
  1330  		v.AddArg2(ptr, v0)
  1331  		return true
  1332  	}
  1333  }
  1334  func rewriteValueMIPS_OpIsSliceInBounds(v *Value) bool {
  1335  	v_1 := v.Args[1]
  1336  	v_0 := v.Args[0]
  1337  	b := v.Block
  1338  	typ := &b.Func.Config.Types
  1339  	// match: (IsSliceInBounds idx len)
  1340  	// result: (XORconst [1] (SGTU idx len))
  1341  	for {
  1342  		idx := v_0
  1343  		len := v_1
  1344  		v.reset(OpMIPSXORconst)
  1345  		v.AuxInt = int32ToAuxInt(1)
  1346  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  1347  		v0.AddArg2(idx, len)
  1348  		v.AddArg(v0)
  1349  		return true
  1350  	}
  1351  }
  1352  func rewriteValueMIPS_OpLeq16(v *Value) bool {
  1353  	v_1 := v.Args[1]
  1354  	v_0 := v.Args[0]
  1355  	b := v.Block
  1356  	typ := &b.Func.Config.Types
  1357  	// match: (Leq16 x y)
  1358  	// result: (XORconst [1] (SGT (SignExt16to32 x) (SignExt16to32 y)))
  1359  	for {
  1360  		x := v_0
  1361  		y := v_1
  1362  		v.reset(OpMIPSXORconst)
  1363  		v.AuxInt = int32ToAuxInt(1)
  1364  		v0 := b.NewValue0(v.Pos, OpMIPSSGT, typ.Bool)
  1365  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1366  		v1.AddArg(x)
  1367  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1368  		v2.AddArg(y)
  1369  		v0.AddArg2(v1, v2)
  1370  		v.AddArg(v0)
  1371  		return true
  1372  	}
  1373  }
  1374  func rewriteValueMIPS_OpLeq16U(v *Value) bool {
  1375  	v_1 := v.Args[1]
  1376  	v_0 := v.Args[0]
  1377  	b := v.Block
  1378  	typ := &b.Func.Config.Types
  1379  	// match: (Leq16U x y)
  1380  	// result: (XORconst [1] (SGTU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  1381  	for {
  1382  		x := v_0
  1383  		y := v_1
  1384  		v.reset(OpMIPSXORconst)
  1385  		v.AuxInt = int32ToAuxInt(1)
  1386  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  1387  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1388  		v1.AddArg(x)
  1389  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1390  		v2.AddArg(y)
  1391  		v0.AddArg2(v1, v2)
  1392  		v.AddArg(v0)
  1393  		return true
  1394  	}
  1395  }
  1396  func rewriteValueMIPS_OpLeq32(v *Value) bool {
  1397  	v_1 := v.Args[1]
  1398  	v_0 := v.Args[0]
  1399  	b := v.Block
  1400  	typ := &b.Func.Config.Types
  1401  	// match: (Leq32 x y)
  1402  	// result: (XORconst [1] (SGT x y))
  1403  	for {
  1404  		x := v_0
  1405  		y := v_1
  1406  		v.reset(OpMIPSXORconst)
  1407  		v.AuxInt = int32ToAuxInt(1)
  1408  		v0 := b.NewValue0(v.Pos, OpMIPSSGT, typ.Bool)
  1409  		v0.AddArg2(x, y)
  1410  		v.AddArg(v0)
  1411  		return true
  1412  	}
  1413  }
  1414  func rewriteValueMIPS_OpLeq32F(v *Value) bool {
  1415  	v_1 := v.Args[1]
  1416  	v_0 := v.Args[0]
  1417  	b := v.Block
  1418  	// match: (Leq32F x y)
  1419  	// result: (FPFlagTrue (CMPGEF y x))
  1420  	for {
  1421  		x := v_0
  1422  		y := v_1
  1423  		v.reset(OpMIPSFPFlagTrue)
  1424  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGEF, types.TypeFlags)
  1425  		v0.AddArg2(y, x)
  1426  		v.AddArg(v0)
  1427  		return true
  1428  	}
  1429  }
  1430  func rewriteValueMIPS_OpLeq32U(v *Value) bool {
  1431  	v_1 := v.Args[1]
  1432  	v_0 := v.Args[0]
  1433  	b := v.Block
  1434  	typ := &b.Func.Config.Types
  1435  	// match: (Leq32U x y)
  1436  	// result: (XORconst [1] (SGTU x y))
  1437  	for {
  1438  		x := v_0
  1439  		y := v_1
  1440  		v.reset(OpMIPSXORconst)
  1441  		v.AuxInt = int32ToAuxInt(1)
  1442  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  1443  		v0.AddArg2(x, y)
  1444  		v.AddArg(v0)
  1445  		return true
  1446  	}
  1447  }
  1448  func rewriteValueMIPS_OpLeq64F(v *Value) bool {
  1449  	v_1 := v.Args[1]
  1450  	v_0 := v.Args[0]
  1451  	b := v.Block
  1452  	// match: (Leq64F x y)
  1453  	// result: (FPFlagTrue (CMPGED y x))
  1454  	for {
  1455  		x := v_0
  1456  		y := v_1
  1457  		v.reset(OpMIPSFPFlagTrue)
  1458  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGED, types.TypeFlags)
  1459  		v0.AddArg2(y, x)
  1460  		v.AddArg(v0)
  1461  		return true
  1462  	}
  1463  }
  1464  func rewriteValueMIPS_OpLeq8(v *Value) bool {
  1465  	v_1 := v.Args[1]
  1466  	v_0 := v.Args[0]
  1467  	b := v.Block
  1468  	typ := &b.Func.Config.Types
  1469  	// match: (Leq8 x y)
  1470  	// result: (XORconst [1] (SGT (SignExt8to32 x) (SignExt8to32 y)))
  1471  	for {
  1472  		x := v_0
  1473  		y := v_1
  1474  		v.reset(OpMIPSXORconst)
  1475  		v.AuxInt = int32ToAuxInt(1)
  1476  		v0 := b.NewValue0(v.Pos, OpMIPSSGT, typ.Bool)
  1477  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1478  		v1.AddArg(x)
  1479  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1480  		v2.AddArg(y)
  1481  		v0.AddArg2(v1, v2)
  1482  		v.AddArg(v0)
  1483  		return true
  1484  	}
  1485  }
  1486  func rewriteValueMIPS_OpLeq8U(v *Value) bool {
  1487  	v_1 := v.Args[1]
  1488  	v_0 := v.Args[0]
  1489  	b := v.Block
  1490  	typ := &b.Func.Config.Types
  1491  	// match: (Leq8U x y)
  1492  	// result: (XORconst [1] (SGTU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  1493  	for {
  1494  		x := v_0
  1495  		y := v_1
  1496  		v.reset(OpMIPSXORconst)
  1497  		v.AuxInt = int32ToAuxInt(1)
  1498  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  1499  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1500  		v1.AddArg(x)
  1501  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1502  		v2.AddArg(y)
  1503  		v0.AddArg2(v1, v2)
  1504  		v.AddArg(v0)
  1505  		return true
  1506  	}
  1507  }
  1508  func rewriteValueMIPS_OpLess16(v *Value) bool {
  1509  	v_1 := v.Args[1]
  1510  	v_0 := v.Args[0]
  1511  	b := v.Block
  1512  	typ := &b.Func.Config.Types
  1513  	// match: (Less16 x y)
  1514  	// result: (SGT (SignExt16to32 y) (SignExt16to32 x))
  1515  	for {
  1516  		x := v_0
  1517  		y := v_1
  1518  		v.reset(OpMIPSSGT)
  1519  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1520  		v0.AddArg(y)
  1521  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1522  		v1.AddArg(x)
  1523  		v.AddArg2(v0, v1)
  1524  		return true
  1525  	}
  1526  }
  1527  func rewriteValueMIPS_OpLess16U(v *Value) bool {
  1528  	v_1 := v.Args[1]
  1529  	v_0 := v.Args[0]
  1530  	b := v.Block
  1531  	typ := &b.Func.Config.Types
  1532  	// match: (Less16U x y)
  1533  	// result: (SGTU (ZeroExt16to32 y) (ZeroExt16to32 x))
  1534  	for {
  1535  		x := v_0
  1536  		y := v_1
  1537  		v.reset(OpMIPSSGTU)
  1538  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1539  		v0.AddArg(y)
  1540  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1541  		v1.AddArg(x)
  1542  		v.AddArg2(v0, v1)
  1543  		return true
  1544  	}
  1545  }
  1546  func rewriteValueMIPS_OpLess32(v *Value) bool {
  1547  	v_1 := v.Args[1]
  1548  	v_0 := v.Args[0]
  1549  	// match: (Less32 x y)
  1550  	// result: (SGT y x)
  1551  	for {
  1552  		x := v_0
  1553  		y := v_1
  1554  		v.reset(OpMIPSSGT)
  1555  		v.AddArg2(y, x)
  1556  		return true
  1557  	}
  1558  }
  1559  func rewriteValueMIPS_OpLess32F(v *Value) bool {
  1560  	v_1 := v.Args[1]
  1561  	v_0 := v.Args[0]
  1562  	b := v.Block
  1563  	// match: (Less32F x y)
  1564  	// result: (FPFlagTrue (CMPGTF y x))
  1565  	for {
  1566  		x := v_0
  1567  		y := v_1
  1568  		v.reset(OpMIPSFPFlagTrue)
  1569  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGTF, types.TypeFlags)
  1570  		v0.AddArg2(y, x)
  1571  		v.AddArg(v0)
  1572  		return true
  1573  	}
  1574  }
  1575  func rewriteValueMIPS_OpLess32U(v *Value) bool {
  1576  	v_1 := v.Args[1]
  1577  	v_0 := v.Args[0]
  1578  	// match: (Less32U x y)
  1579  	// result: (SGTU y x)
  1580  	for {
  1581  		x := v_0
  1582  		y := v_1
  1583  		v.reset(OpMIPSSGTU)
  1584  		v.AddArg2(y, x)
  1585  		return true
  1586  	}
  1587  }
  1588  func rewriteValueMIPS_OpLess64F(v *Value) bool {
  1589  	v_1 := v.Args[1]
  1590  	v_0 := v.Args[0]
  1591  	b := v.Block
  1592  	// match: (Less64F x y)
  1593  	// result: (FPFlagTrue (CMPGTD y x))
  1594  	for {
  1595  		x := v_0
  1596  		y := v_1
  1597  		v.reset(OpMIPSFPFlagTrue)
  1598  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGTD, types.TypeFlags)
  1599  		v0.AddArg2(y, x)
  1600  		v.AddArg(v0)
  1601  		return true
  1602  	}
  1603  }
  1604  func rewriteValueMIPS_OpLess8(v *Value) bool {
  1605  	v_1 := v.Args[1]
  1606  	v_0 := v.Args[0]
  1607  	b := v.Block
  1608  	typ := &b.Func.Config.Types
  1609  	// match: (Less8 x y)
  1610  	// result: (SGT (SignExt8to32 y) (SignExt8to32 x))
  1611  	for {
  1612  		x := v_0
  1613  		y := v_1
  1614  		v.reset(OpMIPSSGT)
  1615  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1616  		v0.AddArg(y)
  1617  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1618  		v1.AddArg(x)
  1619  		v.AddArg2(v0, v1)
  1620  		return true
  1621  	}
  1622  }
  1623  func rewriteValueMIPS_OpLess8U(v *Value) bool {
  1624  	v_1 := v.Args[1]
  1625  	v_0 := v.Args[0]
  1626  	b := v.Block
  1627  	typ := &b.Func.Config.Types
  1628  	// match: (Less8U x y)
  1629  	// result: (SGTU (ZeroExt8to32 y) (ZeroExt8to32 x))
  1630  	for {
  1631  		x := v_0
  1632  		y := v_1
  1633  		v.reset(OpMIPSSGTU)
  1634  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1635  		v0.AddArg(y)
  1636  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1637  		v1.AddArg(x)
  1638  		v.AddArg2(v0, v1)
  1639  		return true
  1640  	}
  1641  }
  1642  func rewriteValueMIPS_OpLoad(v *Value) bool {
  1643  	v_1 := v.Args[1]
  1644  	v_0 := v.Args[0]
  1645  	// match: (Load <t> ptr mem)
  1646  	// cond: t.IsBoolean()
  1647  	// result: (MOVBUload ptr mem)
  1648  	for {
  1649  		t := v.Type
  1650  		ptr := v_0
  1651  		mem := v_1
  1652  		if !(t.IsBoolean()) {
  1653  			break
  1654  		}
  1655  		v.reset(OpMIPSMOVBUload)
  1656  		v.AddArg2(ptr, mem)
  1657  		return true
  1658  	}
  1659  	// match: (Load <t> ptr mem)
  1660  	// cond: (is8BitInt(t) && t.IsSigned())
  1661  	// result: (MOVBload ptr mem)
  1662  	for {
  1663  		t := v.Type
  1664  		ptr := v_0
  1665  		mem := v_1
  1666  		if !(is8BitInt(t) && t.IsSigned()) {
  1667  			break
  1668  		}
  1669  		v.reset(OpMIPSMOVBload)
  1670  		v.AddArg2(ptr, mem)
  1671  		return true
  1672  	}
  1673  	// match: (Load <t> ptr mem)
  1674  	// cond: (is8BitInt(t) && !t.IsSigned())
  1675  	// result: (MOVBUload ptr mem)
  1676  	for {
  1677  		t := v.Type
  1678  		ptr := v_0
  1679  		mem := v_1
  1680  		if !(is8BitInt(t) && !t.IsSigned()) {
  1681  			break
  1682  		}
  1683  		v.reset(OpMIPSMOVBUload)
  1684  		v.AddArg2(ptr, mem)
  1685  		return true
  1686  	}
  1687  	// match: (Load <t> ptr mem)
  1688  	// cond: (is16BitInt(t) && t.IsSigned())
  1689  	// result: (MOVHload ptr mem)
  1690  	for {
  1691  		t := v.Type
  1692  		ptr := v_0
  1693  		mem := v_1
  1694  		if !(is16BitInt(t) && t.IsSigned()) {
  1695  			break
  1696  		}
  1697  		v.reset(OpMIPSMOVHload)
  1698  		v.AddArg2(ptr, mem)
  1699  		return true
  1700  	}
  1701  	// match: (Load <t> ptr mem)
  1702  	// cond: (is16BitInt(t) && !t.IsSigned())
  1703  	// result: (MOVHUload ptr mem)
  1704  	for {
  1705  		t := v.Type
  1706  		ptr := v_0
  1707  		mem := v_1
  1708  		if !(is16BitInt(t) && !t.IsSigned()) {
  1709  			break
  1710  		}
  1711  		v.reset(OpMIPSMOVHUload)
  1712  		v.AddArg2(ptr, mem)
  1713  		return true
  1714  	}
  1715  	// match: (Load <t> ptr mem)
  1716  	// cond: (is32BitInt(t) || isPtr(t))
  1717  	// result: (MOVWload ptr mem)
  1718  	for {
  1719  		t := v.Type
  1720  		ptr := v_0
  1721  		mem := v_1
  1722  		if !(is32BitInt(t) || isPtr(t)) {
  1723  			break
  1724  		}
  1725  		v.reset(OpMIPSMOVWload)
  1726  		v.AddArg2(ptr, mem)
  1727  		return true
  1728  	}
  1729  	// match: (Load <t> ptr mem)
  1730  	// cond: is32BitFloat(t)
  1731  	// result: (MOVFload ptr mem)
  1732  	for {
  1733  		t := v.Type
  1734  		ptr := v_0
  1735  		mem := v_1
  1736  		if !(is32BitFloat(t)) {
  1737  			break
  1738  		}
  1739  		v.reset(OpMIPSMOVFload)
  1740  		v.AddArg2(ptr, mem)
  1741  		return true
  1742  	}
  1743  	// match: (Load <t> ptr mem)
  1744  	// cond: is64BitFloat(t)
  1745  	// result: (MOVDload ptr mem)
  1746  	for {
  1747  		t := v.Type
  1748  		ptr := v_0
  1749  		mem := v_1
  1750  		if !(is64BitFloat(t)) {
  1751  			break
  1752  		}
  1753  		v.reset(OpMIPSMOVDload)
  1754  		v.AddArg2(ptr, mem)
  1755  		return true
  1756  	}
  1757  	return false
  1758  }
  1759  func rewriteValueMIPS_OpLocalAddr(v *Value) bool {
  1760  	v_1 := v.Args[1]
  1761  	v_0 := v.Args[0]
  1762  	b := v.Block
  1763  	typ := &b.Func.Config.Types
  1764  	// match: (LocalAddr <t> {sym} base mem)
  1765  	// cond: t.Elem().HasPointers()
  1766  	// result: (MOVWaddr {sym} (SPanchored base mem))
  1767  	for {
  1768  		t := v.Type
  1769  		sym := auxToSym(v.Aux)
  1770  		base := v_0
  1771  		mem := v_1
  1772  		if !(t.Elem().HasPointers()) {
  1773  			break
  1774  		}
  1775  		v.reset(OpMIPSMOVWaddr)
  1776  		v.Aux = symToAux(sym)
  1777  		v0 := b.NewValue0(v.Pos, OpSPanchored, typ.Uintptr)
  1778  		v0.AddArg2(base, mem)
  1779  		v.AddArg(v0)
  1780  		return true
  1781  	}
  1782  	// match: (LocalAddr <t> {sym} base _)
  1783  	// cond: !t.Elem().HasPointers()
  1784  	// result: (MOVWaddr {sym} base)
  1785  	for {
  1786  		t := v.Type
  1787  		sym := auxToSym(v.Aux)
  1788  		base := v_0
  1789  		if !(!t.Elem().HasPointers()) {
  1790  			break
  1791  		}
  1792  		v.reset(OpMIPSMOVWaddr)
  1793  		v.Aux = symToAux(sym)
  1794  		v.AddArg(base)
  1795  		return true
  1796  	}
  1797  	return false
  1798  }
  1799  func rewriteValueMIPS_OpLsh16x16(v *Value) bool {
  1800  	v_1 := v.Args[1]
  1801  	v_0 := v.Args[0]
  1802  	b := v.Block
  1803  	typ := &b.Func.Config.Types
  1804  	// match: (Lsh16x16 <t> x y)
  1805  	// result: (CMOVZ (SLL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  1806  	for {
  1807  		t := v.Type
  1808  		x := v_0
  1809  		y := v_1
  1810  		v.reset(OpMIPSCMOVZ)
  1811  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1812  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1813  		v1.AddArg(y)
  1814  		v0.AddArg2(x, v1)
  1815  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1816  		v2.AuxInt = int32ToAuxInt(0)
  1817  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1818  		v3.AuxInt = int32ToAuxInt(32)
  1819  		v3.AddArg(v1)
  1820  		v.AddArg3(v0, v2, v3)
  1821  		return true
  1822  	}
  1823  }
  1824  func rewriteValueMIPS_OpLsh16x32(v *Value) bool {
  1825  	v_1 := v.Args[1]
  1826  	v_0 := v.Args[0]
  1827  	b := v.Block
  1828  	typ := &b.Func.Config.Types
  1829  	// match: (Lsh16x32 <t> x y)
  1830  	// result: (CMOVZ (SLL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
  1831  	for {
  1832  		t := v.Type
  1833  		x := v_0
  1834  		y := v_1
  1835  		v.reset(OpMIPSCMOVZ)
  1836  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1837  		v0.AddArg2(x, y)
  1838  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1839  		v1.AuxInt = int32ToAuxInt(0)
  1840  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1841  		v2.AuxInt = int32ToAuxInt(32)
  1842  		v2.AddArg(y)
  1843  		v.AddArg3(v0, v1, v2)
  1844  		return true
  1845  	}
  1846  }
  1847  func rewriteValueMIPS_OpLsh16x64(v *Value) bool {
  1848  	v_1 := v.Args[1]
  1849  	v_0 := v.Args[0]
  1850  	// match: (Lsh16x64 x (Const64 [c]))
  1851  	// cond: uint32(c) < 16
  1852  	// result: (SLLconst x [int32(c)])
  1853  	for {
  1854  		x := v_0
  1855  		if v_1.Op != OpConst64 {
  1856  			break
  1857  		}
  1858  		c := auxIntToInt64(v_1.AuxInt)
  1859  		if !(uint32(c) < 16) {
  1860  			break
  1861  		}
  1862  		v.reset(OpMIPSSLLconst)
  1863  		v.AuxInt = int32ToAuxInt(int32(c))
  1864  		v.AddArg(x)
  1865  		return true
  1866  	}
  1867  	// match: (Lsh16x64 _ (Const64 [c]))
  1868  	// cond: uint32(c) >= 16
  1869  	// result: (MOVWconst [0])
  1870  	for {
  1871  		if v_1.Op != OpConst64 {
  1872  			break
  1873  		}
  1874  		c := auxIntToInt64(v_1.AuxInt)
  1875  		if !(uint32(c) >= 16) {
  1876  			break
  1877  		}
  1878  		v.reset(OpMIPSMOVWconst)
  1879  		v.AuxInt = int32ToAuxInt(0)
  1880  		return true
  1881  	}
  1882  	return false
  1883  }
  1884  func rewriteValueMIPS_OpLsh16x8(v *Value) bool {
  1885  	v_1 := v.Args[1]
  1886  	v_0 := v.Args[0]
  1887  	b := v.Block
  1888  	typ := &b.Func.Config.Types
  1889  	// match: (Lsh16x8 <t> x y)
  1890  	// result: (CMOVZ (SLL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  1891  	for {
  1892  		t := v.Type
  1893  		x := v_0
  1894  		y := v_1
  1895  		v.reset(OpMIPSCMOVZ)
  1896  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1897  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1898  		v1.AddArg(y)
  1899  		v0.AddArg2(x, v1)
  1900  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1901  		v2.AuxInt = int32ToAuxInt(0)
  1902  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1903  		v3.AuxInt = int32ToAuxInt(32)
  1904  		v3.AddArg(v1)
  1905  		v.AddArg3(v0, v2, v3)
  1906  		return true
  1907  	}
  1908  }
  1909  func rewriteValueMIPS_OpLsh32x16(v *Value) bool {
  1910  	v_1 := v.Args[1]
  1911  	v_0 := v.Args[0]
  1912  	b := v.Block
  1913  	typ := &b.Func.Config.Types
  1914  	// match: (Lsh32x16 <t> x y)
  1915  	// result: (CMOVZ (SLL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  1916  	for {
  1917  		t := v.Type
  1918  		x := v_0
  1919  		y := v_1
  1920  		v.reset(OpMIPSCMOVZ)
  1921  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1922  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1923  		v1.AddArg(y)
  1924  		v0.AddArg2(x, v1)
  1925  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1926  		v2.AuxInt = int32ToAuxInt(0)
  1927  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1928  		v3.AuxInt = int32ToAuxInt(32)
  1929  		v3.AddArg(v1)
  1930  		v.AddArg3(v0, v2, v3)
  1931  		return true
  1932  	}
  1933  }
  1934  func rewriteValueMIPS_OpLsh32x32(v *Value) bool {
  1935  	v_1 := v.Args[1]
  1936  	v_0 := v.Args[0]
  1937  	b := v.Block
  1938  	typ := &b.Func.Config.Types
  1939  	// match: (Lsh32x32 <t> x y)
  1940  	// result: (CMOVZ (SLL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
  1941  	for {
  1942  		t := v.Type
  1943  		x := v_0
  1944  		y := v_1
  1945  		v.reset(OpMIPSCMOVZ)
  1946  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1947  		v0.AddArg2(x, y)
  1948  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1949  		v1.AuxInt = int32ToAuxInt(0)
  1950  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1951  		v2.AuxInt = int32ToAuxInt(32)
  1952  		v2.AddArg(y)
  1953  		v.AddArg3(v0, v1, v2)
  1954  		return true
  1955  	}
  1956  }
  1957  func rewriteValueMIPS_OpLsh32x64(v *Value) bool {
  1958  	v_1 := v.Args[1]
  1959  	v_0 := v.Args[0]
  1960  	// match: (Lsh32x64 x (Const64 [c]))
  1961  	// cond: uint32(c) < 32
  1962  	// result: (SLLconst x [int32(c)])
  1963  	for {
  1964  		x := v_0
  1965  		if v_1.Op != OpConst64 {
  1966  			break
  1967  		}
  1968  		c := auxIntToInt64(v_1.AuxInt)
  1969  		if !(uint32(c) < 32) {
  1970  			break
  1971  		}
  1972  		v.reset(OpMIPSSLLconst)
  1973  		v.AuxInt = int32ToAuxInt(int32(c))
  1974  		v.AddArg(x)
  1975  		return true
  1976  	}
  1977  	// match: (Lsh32x64 _ (Const64 [c]))
  1978  	// cond: uint32(c) >= 32
  1979  	// result: (MOVWconst [0])
  1980  	for {
  1981  		if v_1.Op != OpConst64 {
  1982  			break
  1983  		}
  1984  		c := auxIntToInt64(v_1.AuxInt)
  1985  		if !(uint32(c) >= 32) {
  1986  			break
  1987  		}
  1988  		v.reset(OpMIPSMOVWconst)
  1989  		v.AuxInt = int32ToAuxInt(0)
  1990  		return true
  1991  	}
  1992  	return false
  1993  }
  1994  func rewriteValueMIPS_OpLsh32x8(v *Value) bool {
  1995  	v_1 := v.Args[1]
  1996  	v_0 := v.Args[0]
  1997  	b := v.Block
  1998  	typ := &b.Func.Config.Types
  1999  	// match: (Lsh32x8 <t> x y)
  2000  	// result: (CMOVZ (SLL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  2001  	for {
  2002  		t := v.Type
  2003  		x := v_0
  2004  		y := v_1
  2005  		v.reset(OpMIPSCMOVZ)
  2006  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  2007  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2008  		v1.AddArg(y)
  2009  		v0.AddArg2(x, v1)
  2010  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  2011  		v2.AuxInt = int32ToAuxInt(0)
  2012  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  2013  		v3.AuxInt = int32ToAuxInt(32)
  2014  		v3.AddArg(v1)
  2015  		v.AddArg3(v0, v2, v3)
  2016  		return true
  2017  	}
  2018  }
  2019  func rewriteValueMIPS_OpLsh8x16(v *Value) bool {
  2020  	v_1 := v.Args[1]
  2021  	v_0 := v.Args[0]
  2022  	b := v.Block
  2023  	typ := &b.Func.Config.Types
  2024  	// match: (Lsh8x16 <t> x y)
  2025  	// result: (CMOVZ (SLL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  2026  	for {
  2027  		t := v.Type
  2028  		x := v_0
  2029  		y := v_1
  2030  		v.reset(OpMIPSCMOVZ)
  2031  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  2032  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2033  		v1.AddArg(y)
  2034  		v0.AddArg2(x, v1)
  2035  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  2036  		v2.AuxInt = int32ToAuxInt(0)
  2037  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  2038  		v3.AuxInt = int32ToAuxInt(32)
  2039  		v3.AddArg(v1)
  2040  		v.AddArg3(v0, v2, v3)
  2041  		return true
  2042  	}
  2043  }
  2044  func rewriteValueMIPS_OpLsh8x32(v *Value) bool {
  2045  	v_1 := v.Args[1]
  2046  	v_0 := v.Args[0]
  2047  	b := v.Block
  2048  	typ := &b.Func.Config.Types
  2049  	// match: (Lsh8x32 <t> x y)
  2050  	// result: (CMOVZ (SLL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
  2051  	for {
  2052  		t := v.Type
  2053  		x := v_0
  2054  		y := v_1
  2055  		v.reset(OpMIPSCMOVZ)
  2056  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  2057  		v0.AddArg2(x, y)
  2058  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  2059  		v1.AuxInt = int32ToAuxInt(0)
  2060  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  2061  		v2.AuxInt = int32ToAuxInt(32)
  2062  		v2.AddArg(y)
  2063  		v.AddArg3(v0, v1, v2)
  2064  		return true
  2065  	}
  2066  }
  2067  func rewriteValueMIPS_OpLsh8x64(v *Value) bool {
  2068  	v_1 := v.Args[1]
  2069  	v_0 := v.Args[0]
  2070  	// match: (Lsh8x64 x (Const64 [c]))
  2071  	// cond: uint32(c) < 8
  2072  	// result: (SLLconst x [int32(c)])
  2073  	for {
  2074  		x := v_0
  2075  		if v_1.Op != OpConst64 {
  2076  			break
  2077  		}
  2078  		c := auxIntToInt64(v_1.AuxInt)
  2079  		if !(uint32(c) < 8) {
  2080  			break
  2081  		}
  2082  		v.reset(OpMIPSSLLconst)
  2083  		v.AuxInt = int32ToAuxInt(int32(c))
  2084  		v.AddArg(x)
  2085  		return true
  2086  	}
  2087  	// match: (Lsh8x64 _ (Const64 [c]))
  2088  	// cond: uint32(c) >= 8
  2089  	// result: (MOVWconst [0])
  2090  	for {
  2091  		if v_1.Op != OpConst64 {
  2092  			break
  2093  		}
  2094  		c := auxIntToInt64(v_1.AuxInt)
  2095  		if !(uint32(c) >= 8) {
  2096  			break
  2097  		}
  2098  		v.reset(OpMIPSMOVWconst)
  2099  		v.AuxInt = int32ToAuxInt(0)
  2100  		return true
  2101  	}
  2102  	return false
  2103  }
  2104  func rewriteValueMIPS_OpLsh8x8(v *Value) bool {
  2105  	v_1 := v.Args[1]
  2106  	v_0 := v.Args[0]
  2107  	b := v.Block
  2108  	typ := &b.Func.Config.Types
  2109  	// match: (Lsh8x8 <t> x y)
  2110  	// result: (CMOVZ (SLL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  2111  	for {
  2112  		t := v.Type
  2113  		x := v_0
  2114  		y := v_1
  2115  		v.reset(OpMIPSCMOVZ)
  2116  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  2117  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2118  		v1.AddArg(y)
  2119  		v0.AddArg2(x, v1)
  2120  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  2121  		v2.AuxInt = int32ToAuxInt(0)
  2122  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  2123  		v3.AuxInt = int32ToAuxInt(32)
  2124  		v3.AddArg(v1)
  2125  		v.AddArg3(v0, v2, v3)
  2126  		return true
  2127  	}
  2128  }
  2129  func rewriteValueMIPS_OpMIPSADD(v *Value) bool {
  2130  	v_1 := v.Args[1]
  2131  	v_0 := v.Args[0]
  2132  	// match: (ADD x (MOVWconst <t> [c]))
  2133  	// cond: !t.IsPtr()
  2134  	// result: (ADDconst [c] x)
  2135  	for {
  2136  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2137  			x := v_0
  2138  			if v_1.Op != OpMIPSMOVWconst {
  2139  				continue
  2140  			}
  2141  			t := v_1.Type
  2142  			c := auxIntToInt32(v_1.AuxInt)
  2143  			if !(!t.IsPtr()) {
  2144  				continue
  2145  			}
  2146  			v.reset(OpMIPSADDconst)
  2147  			v.AuxInt = int32ToAuxInt(c)
  2148  			v.AddArg(x)
  2149  			return true
  2150  		}
  2151  		break
  2152  	}
  2153  	// match: (ADD x (NEG y))
  2154  	// result: (SUB x y)
  2155  	for {
  2156  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2157  			x := v_0
  2158  			if v_1.Op != OpMIPSNEG {
  2159  				continue
  2160  			}
  2161  			y := v_1.Args[0]
  2162  			v.reset(OpMIPSSUB)
  2163  			v.AddArg2(x, y)
  2164  			return true
  2165  		}
  2166  		break
  2167  	}
  2168  	return false
  2169  }
  2170  func rewriteValueMIPS_OpMIPSADDconst(v *Value) bool {
  2171  	v_0 := v.Args[0]
  2172  	// match: (ADDconst [off1] (MOVWaddr [off2] {sym} ptr))
  2173  	// result: (MOVWaddr [off1+off2] {sym} ptr)
  2174  	for {
  2175  		off1 := auxIntToInt32(v.AuxInt)
  2176  		if v_0.Op != OpMIPSMOVWaddr {
  2177  			break
  2178  		}
  2179  		off2 := auxIntToInt32(v_0.AuxInt)
  2180  		sym := auxToSym(v_0.Aux)
  2181  		ptr := v_0.Args[0]
  2182  		v.reset(OpMIPSMOVWaddr)
  2183  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2184  		v.Aux = symToAux(sym)
  2185  		v.AddArg(ptr)
  2186  		return true
  2187  	}
  2188  	// match: (ADDconst [0] x)
  2189  	// result: x
  2190  	for {
  2191  		if auxIntToInt32(v.AuxInt) != 0 {
  2192  			break
  2193  		}
  2194  		x := v_0
  2195  		v.copyOf(x)
  2196  		return true
  2197  	}
  2198  	// match: (ADDconst [c] (MOVWconst [d]))
  2199  	// result: (MOVWconst [int32(c+d)])
  2200  	for {
  2201  		c := auxIntToInt32(v.AuxInt)
  2202  		if v_0.Op != OpMIPSMOVWconst {
  2203  			break
  2204  		}
  2205  		d := auxIntToInt32(v_0.AuxInt)
  2206  		v.reset(OpMIPSMOVWconst)
  2207  		v.AuxInt = int32ToAuxInt(int32(c + d))
  2208  		return true
  2209  	}
  2210  	// match: (ADDconst [c] (ADDconst [d] x))
  2211  	// result: (ADDconst [c+d] x)
  2212  	for {
  2213  		c := auxIntToInt32(v.AuxInt)
  2214  		if v_0.Op != OpMIPSADDconst {
  2215  			break
  2216  		}
  2217  		d := auxIntToInt32(v_0.AuxInt)
  2218  		x := v_0.Args[0]
  2219  		v.reset(OpMIPSADDconst)
  2220  		v.AuxInt = int32ToAuxInt(c + d)
  2221  		v.AddArg(x)
  2222  		return true
  2223  	}
  2224  	// match: (ADDconst [c] (SUBconst [d] x))
  2225  	// result: (ADDconst [c-d] x)
  2226  	for {
  2227  		c := auxIntToInt32(v.AuxInt)
  2228  		if v_0.Op != OpMIPSSUBconst {
  2229  			break
  2230  		}
  2231  		d := auxIntToInt32(v_0.AuxInt)
  2232  		x := v_0.Args[0]
  2233  		v.reset(OpMIPSADDconst)
  2234  		v.AuxInt = int32ToAuxInt(c - d)
  2235  		v.AddArg(x)
  2236  		return true
  2237  	}
  2238  	return false
  2239  }
  2240  func rewriteValueMIPS_OpMIPSAND(v *Value) bool {
  2241  	v_1 := v.Args[1]
  2242  	v_0 := v.Args[0]
  2243  	b := v.Block
  2244  	// match: (AND x (MOVWconst [c]))
  2245  	// result: (ANDconst [c] x)
  2246  	for {
  2247  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2248  			x := v_0
  2249  			if v_1.Op != OpMIPSMOVWconst {
  2250  				continue
  2251  			}
  2252  			c := auxIntToInt32(v_1.AuxInt)
  2253  			v.reset(OpMIPSANDconst)
  2254  			v.AuxInt = int32ToAuxInt(c)
  2255  			v.AddArg(x)
  2256  			return true
  2257  		}
  2258  		break
  2259  	}
  2260  	// match: (AND x x)
  2261  	// result: x
  2262  	for {
  2263  		x := v_0
  2264  		if x != v_1 {
  2265  			break
  2266  		}
  2267  		v.copyOf(x)
  2268  		return true
  2269  	}
  2270  	// match: (AND (SGTUconst [1] x) (SGTUconst [1] y))
  2271  	// result: (SGTUconst [1] (OR <x.Type> x y))
  2272  	for {
  2273  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2274  			if v_0.Op != OpMIPSSGTUconst || auxIntToInt32(v_0.AuxInt) != 1 {
  2275  				continue
  2276  			}
  2277  			x := v_0.Args[0]
  2278  			if v_1.Op != OpMIPSSGTUconst || auxIntToInt32(v_1.AuxInt) != 1 {
  2279  				continue
  2280  			}
  2281  			y := v_1.Args[0]
  2282  			v.reset(OpMIPSSGTUconst)
  2283  			v.AuxInt = int32ToAuxInt(1)
  2284  			v0 := b.NewValue0(v.Pos, OpMIPSOR, x.Type)
  2285  			v0.AddArg2(x, y)
  2286  			v.AddArg(v0)
  2287  			return true
  2288  		}
  2289  		break
  2290  	}
  2291  	return false
  2292  }
  2293  func rewriteValueMIPS_OpMIPSANDconst(v *Value) bool {
  2294  	v_0 := v.Args[0]
  2295  	// match: (ANDconst [0] _)
  2296  	// result: (MOVWconst [0])
  2297  	for {
  2298  		if auxIntToInt32(v.AuxInt) != 0 {
  2299  			break
  2300  		}
  2301  		v.reset(OpMIPSMOVWconst)
  2302  		v.AuxInt = int32ToAuxInt(0)
  2303  		return true
  2304  	}
  2305  	// match: (ANDconst [-1] x)
  2306  	// result: x
  2307  	for {
  2308  		if auxIntToInt32(v.AuxInt) != -1 {
  2309  			break
  2310  		}
  2311  		x := v_0
  2312  		v.copyOf(x)
  2313  		return true
  2314  	}
  2315  	// match: (ANDconst [c] (MOVWconst [d]))
  2316  	// result: (MOVWconst [c&d])
  2317  	for {
  2318  		c := auxIntToInt32(v.AuxInt)
  2319  		if v_0.Op != OpMIPSMOVWconst {
  2320  			break
  2321  		}
  2322  		d := auxIntToInt32(v_0.AuxInt)
  2323  		v.reset(OpMIPSMOVWconst)
  2324  		v.AuxInt = int32ToAuxInt(c & d)
  2325  		return true
  2326  	}
  2327  	// match: (ANDconst [c] (ANDconst [d] x))
  2328  	// result: (ANDconst [c&d] x)
  2329  	for {
  2330  		c := auxIntToInt32(v.AuxInt)
  2331  		if v_0.Op != OpMIPSANDconst {
  2332  			break
  2333  		}
  2334  		d := auxIntToInt32(v_0.AuxInt)
  2335  		x := v_0.Args[0]
  2336  		v.reset(OpMIPSANDconst)
  2337  		v.AuxInt = int32ToAuxInt(c & d)
  2338  		v.AddArg(x)
  2339  		return true
  2340  	}
  2341  	return false
  2342  }
  2343  func rewriteValueMIPS_OpMIPSCMOVZ(v *Value) bool {
  2344  	v_2 := v.Args[2]
  2345  	v_1 := v.Args[1]
  2346  	v_0 := v.Args[0]
  2347  	// match: (CMOVZ _ f (MOVWconst [0]))
  2348  	// result: f
  2349  	for {
  2350  		f := v_1
  2351  		if v_2.Op != OpMIPSMOVWconst || auxIntToInt32(v_2.AuxInt) != 0 {
  2352  			break
  2353  		}
  2354  		v.copyOf(f)
  2355  		return true
  2356  	}
  2357  	// match: (CMOVZ a _ (MOVWconst [c]))
  2358  	// cond: c!=0
  2359  	// result: a
  2360  	for {
  2361  		a := v_0
  2362  		if v_2.Op != OpMIPSMOVWconst {
  2363  			break
  2364  		}
  2365  		c := auxIntToInt32(v_2.AuxInt)
  2366  		if !(c != 0) {
  2367  			break
  2368  		}
  2369  		v.copyOf(a)
  2370  		return true
  2371  	}
  2372  	// match: (CMOVZ a (MOVWconst [0]) c)
  2373  	// result: (CMOVZzero a c)
  2374  	for {
  2375  		a := v_0
  2376  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  2377  			break
  2378  		}
  2379  		c := v_2
  2380  		v.reset(OpMIPSCMOVZzero)
  2381  		v.AddArg2(a, c)
  2382  		return true
  2383  	}
  2384  	return false
  2385  }
  2386  func rewriteValueMIPS_OpMIPSCMOVZzero(v *Value) bool {
  2387  	v_1 := v.Args[1]
  2388  	v_0 := v.Args[0]
  2389  	// match: (CMOVZzero _ (MOVWconst [0]))
  2390  	// result: (MOVWconst [0])
  2391  	for {
  2392  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  2393  			break
  2394  		}
  2395  		v.reset(OpMIPSMOVWconst)
  2396  		v.AuxInt = int32ToAuxInt(0)
  2397  		return true
  2398  	}
  2399  	// match: (CMOVZzero a (MOVWconst [c]))
  2400  	// cond: c!=0
  2401  	// result: a
  2402  	for {
  2403  		a := v_0
  2404  		if v_1.Op != OpMIPSMOVWconst {
  2405  			break
  2406  		}
  2407  		c := auxIntToInt32(v_1.AuxInt)
  2408  		if !(c != 0) {
  2409  			break
  2410  		}
  2411  		v.copyOf(a)
  2412  		return true
  2413  	}
  2414  	return false
  2415  }
  2416  func rewriteValueMIPS_OpMIPSLoweredAtomicAdd(v *Value) bool {
  2417  	v_2 := v.Args[2]
  2418  	v_1 := v.Args[1]
  2419  	v_0 := v.Args[0]
  2420  	// match: (LoweredAtomicAdd ptr (MOVWconst [c]) mem)
  2421  	// cond: is16Bit(int64(c))
  2422  	// result: (LoweredAtomicAddconst [c] ptr mem)
  2423  	for {
  2424  		ptr := v_0
  2425  		if v_1.Op != OpMIPSMOVWconst {
  2426  			break
  2427  		}
  2428  		c := auxIntToInt32(v_1.AuxInt)
  2429  		mem := v_2
  2430  		if !(is16Bit(int64(c))) {
  2431  			break
  2432  		}
  2433  		v.reset(OpMIPSLoweredAtomicAddconst)
  2434  		v.AuxInt = int32ToAuxInt(c)
  2435  		v.AddArg2(ptr, mem)
  2436  		return true
  2437  	}
  2438  	return false
  2439  }
  2440  func rewriteValueMIPS_OpMIPSLoweredAtomicStore32(v *Value) bool {
  2441  	v_2 := v.Args[2]
  2442  	v_1 := v.Args[1]
  2443  	v_0 := v.Args[0]
  2444  	// match: (LoweredAtomicStore32 ptr (MOVWconst [0]) mem)
  2445  	// result: (LoweredAtomicStorezero ptr mem)
  2446  	for {
  2447  		ptr := v_0
  2448  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  2449  			break
  2450  		}
  2451  		mem := v_2
  2452  		v.reset(OpMIPSLoweredAtomicStorezero)
  2453  		v.AddArg2(ptr, mem)
  2454  		return true
  2455  	}
  2456  	return false
  2457  }
  2458  func rewriteValueMIPS_OpMIPSLoweredPanicBoundsRC(v *Value) bool {
  2459  	v_1 := v.Args[1]
  2460  	v_0 := v.Args[0]
  2461  	// match: (LoweredPanicBoundsRC [kind] {p} (MOVWconst [c]) mem)
  2462  	// result: (LoweredPanicBoundsCC [kind] {PanicBoundsCC{Cx:int64(c), Cy:p.C}} mem)
  2463  	for {
  2464  		kind := auxIntToInt64(v.AuxInt)
  2465  		p := auxToPanicBoundsC(v.Aux)
  2466  		if v_0.Op != OpMIPSMOVWconst {
  2467  			break
  2468  		}
  2469  		c := auxIntToInt32(v_0.AuxInt)
  2470  		mem := v_1
  2471  		v.reset(OpMIPSLoweredPanicBoundsCC)
  2472  		v.AuxInt = int64ToAuxInt(kind)
  2473  		v.Aux = panicBoundsCCToAux(PanicBoundsCC{Cx: int64(c), Cy: p.C})
  2474  		v.AddArg(mem)
  2475  		return true
  2476  	}
  2477  	return false
  2478  }
  2479  func rewriteValueMIPS_OpMIPSLoweredPanicBoundsRR(v *Value) bool {
  2480  	v_2 := v.Args[2]
  2481  	v_1 := v.Args[1]
  2482  	v_0 := v.Args[0]
  2483  	// match: (LoweredPanicBoundsRR [kind] x (MOVWconst [c]) mem)
  2484  	// result: (LoweredPanicBoundsRC [kind] x {PanicBoundsC{C:int64(c)}} mem)
  2485  	for {
  2486  		kind := auxIntToInt64(v.AuxInt)
  2487  		x := v_0
  2488  		if v_1.Op != OpMIPSMOVWconst {
  2489  			break
  2490  		}
  2491  		c := auxIntToInt32(v_1.AuxInt)
  2492  		mem := v_2
  2493  		v.reset(OpMIPSLoweredPanicBoundsRC)
  2494  		v.AuxInt = int64ToAuxInt(kind)
  2495  		v.Aux = panicBoundsCToAux(PanicBoundsC{C: int64(c)})
  2496  		v.AddArg2(x, mem)
  2497  		return true
  2498  	}
  2499  	// match: (LoweredPanicBoundsRR [kind] (MOVWconst [c]) y mem)
  2500  	// result: (LoweredPanicBoundsCR [kind] {PanicBoundsC{C:int64(c)}} y mem)
  2501  	for {
  2502  		kind := auxIntToInt64(v.AuxInt)
  2503  		if v_0.Op != OpMIPSMOVWconst {
  2504  			break
  2505  		}
  2506  		c := auxIntToInt32(v_0.AuxInt)
  2507  		y := v_1
  2508  		mem := v_2
  2509  		v.reset(OpMIPSLoweredPanicBoundsCR)
  2510  		v.AuxInt = int64ToAuxInt(kind)
  2511  		v.Aux = panicBoundsCToAux(PanicBoundsC{C: int64(c)})
  2512  		v.AddArg2(y, mem)
  2513  		return true
  2514  	}
  2515  	return false
  2516  }
  2517  func rewriteValueMIPS_OpMIPSLoweredPanicExtendRC(v *Value) bool {
  2518  	v_2 := v.Args[2]
  2519  	v_1 := v.Args[1]
  2520  	v_0 := v.Args[0]
  2521  	// match: (LoweredPanicExtendRC [kind] {p} (MOVWconst [hi]) (MOVWconst [lo]) mem)
  2522  	// result: (LoweredPanicBoundsCC [kind] {PanicBoundsCC{Cx:int64(hi)<<32+int64(uint32(lo)), Cy:p.C}} mem)
  2523  	for {
  2524  		kind := auxIntToInt64(v.AuxInt)
  2525  		p := auxToPanicBoundsC(v.Aux)
  2526  		if v_0.Op != OpMIPSMOVWconst {
  2527  			break
  2528  		}
  2529  		hi := auxIntToInt32(v_0.AuxInt)
  2530  		if v_1.Op != OpMIPSMOVWconst {
  2531  			break
  2532  		}
  2533  		lo := auxIntToInt32(v_1.AuxInt)
  2534  		mem := v_2
  2535  		v.reset(OpMIPSLoweredPanicBoundsCC)
  2536  		v.AuxInt = int64ToAuxInt(kind)
  2537  		v.Aux = panicBoundsCCToAux(PanicBoundsCC{Cx: int64(hi)<<32 + int64(uint32(lo)), Cy: p.C})
  2538  		v.AddArg(mem)
  2539  		return true
  2540  	}
  2541  	return false
  2542  }
  2543  func rewriteValueMIPS_OpMIPSLoweredPanicExtendRR(v *Value) bool {
  2544  	v_3 := v.Args[3]
  2545  	v_2 := v.Args[2]
  2546  	v_1 := v.Args[1]
  2547  	v_0 := v.Args[0]
  2548  	// match: (LoweredPanicExtendRR [kind] hi lo (MOVWconst [c]) mem)
  2549  	// result: (LoweredPanicExtendRC [kind] hi lo {PanicBoundsC{C:int64(c)}} mem)
  2550  	for {
  2551  		kind := auxIntToInt64(v.AuxInt)
  2552  		hi := v_0
  2553  		lo := v_1
  2554  		if v_2.Op != OpMIPSMOVWconst {
  2555  			break
  2556  		}
  2557  		c := auxIntToInt32(v_2.AuxInt)
  2558  		mem := v_3
  2559  		v.reset(OpMIPSLoweredPanicExtendRC)
  2560  		v.AuxInt = int64ToAuxInt(kind)
  2561  		v.Aux = panicBoundsCToAux(PanicBoundsC{C: int64(c)})
  2562  		v.AddArg3(hi, lo, mem)
  2563  		return true
  2564  	}
  2565  	// match: (LoweredPanicExtendRR [kind] (MOVWconst [hi]) (MOVWconst [lo]) y mem)
  2566  	// result: (LoweredPanicBoundsCR [kind] {PanicBoundsC{C:int64(hi)<<32 + int64(uint32(lo))}} y mem)
  2567  	for {
  2568  		kind := auxIntToInt64(v.AuxInt)
  2569  		if v_0.Op != OpMIPSMOVWconst {
  2570  			break
  2571  		}
  2572  		hi := auxIntToInt32(v_0.AuxInt)
  2573  		if v_1.Op != OpMIPSMOVWconst {
  2574  			break
  2575  		}
  2576  		lo := auxIntToInt32(v_1.AuxInt)
  2577  		y := v_2
  2578  		mem := v_3
  2579  		v.reset(OpMIPSLoweredPanicBoundsCR)
  2580  		v.AuxInt = int64ToAuxInt(kind)
  2581  		v.Aux = panicBoundsCToAux(PanicBoundsC{C: int64(hi)<<32 + int64(uint32(lo))})
  2582  		v.AddArg2(y, mem)
  2583  		return true
  2584  	}
  2585  	return false
  2586  }
  2587  func rewriteValueMIPS_OpMIPSMOVBUload(v *Value) bool {
  2588  	v_1 := v.Args[1]
  2589  	v_0 := v.Args[0]
  2590  	// match: (MOVBUload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  2591  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  2592  	// result: (MOVBUload [off1+off2] {sym} ptr mem)
  2593  	for {
  2594  		off1 := auxIntToInt32(v.AuxInt)
  2595  		sym := auxToSym(v.Aux)
  2596  		x := v_0
  2597  		if x.Op != OpMIPSADDconst {
  2598  			break
  2599  		}
  2600  		off2 := auxIntToInt32(x.AuxInt)
  2601  		ptr := x.Args[0]
  2602  		mem := v_1
  2603  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  2604  			break
  2605  		}
  2606  		v.reset(OpMIPSMOVBUload)
  2607  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2608  		v.Aux = symToAux(sym)
  2609  		v.AddArg2(ptr, mem)
  2610  		return true
  2611  	}
  2612  	// match: (MOVBUload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  2613  	// cond: canMergeSym(sym1,sym2)
  2614  	// result: (MOVBUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  2615  	for {
  2616  		off1 := auxIntToInt32(v.AuxInt)
  2617  		sym1 := auxToSym(v.Aux)
  2618  		if v_0.Op != OpMIPSMOVWaddr {
  2619  			break
  2620  		}
  2621  		off2 := auxIntToInt32(v_0.AuxInt)
  2622  		sym2 := auxToSym(v_0.Aux)
  2623  		ptr := v_0.Args[0]
  2624  		mem := v_1
  2625  		if !(canMergeSym(sym1, sym2)) {
  2626  			break
  2627  		}
  2628  		v.reset(OpMIPSMOVBUload)
  2629  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2630  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2631  		v.AddArg2(ptr, mem)
  2632  		return true
  2633  	}
  2634  	// match: (MOVBUload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _))
  2635  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  2636  	// result: (MOVBUreg x)
  2637  	for {
  2638  		off := auxIntToInt32(v.AuxInt)
  2639  		sym := auxToSym(v.Aux)
  2640  		ptr := v_0
  2641  		if v_1.Op != OpMIPSMOVBstore {
  2642  			break
  2643  		}
  2644  		off2 := auxIntToInt32(v_1.AuxInt)
  2645  		sym2 := auxToSym(v_1.Aux)
  2646  		x := v_1.Args[1]
  2647  		ptr2 := v_1.Args[0]
  2648  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  2649  			break
  2650  		}
  2651  		v.reset(OpMIPSMOVBUreg)
  2652  		v.AddArg(x)
  2653  		return true
  2654  	}
  2655  	return false
  2656  }
  2657  func rewriteValueMIPS_OpMIPSMOVBUreg(v *Value) bool {
  2658  	v_0 := v.Args[0]
  2659  	b := v.Block
  2660  	// match: (MOVBUreg x:(MOVBUload _ _))
  2661  	// result: (MOVWreg x)
  2662  	for {
  2663  		x := v_0
  2664  		if x.Op != OpMIPSMOVBUload {
  2665  			break
  2666  		}
  2667  		v.reset(OpMIPSMOVWreg)
  2668  		v.AddArg(x)
  2669  		return true
  2670  	}
  2671  	// match: (MOVBUreg x:(MOVBUreg _))
  2672  	// result: (MOVWreg x)
  2673  	for {
  2674  		x := v_0
  2675  		if x.Op != OpMIPSMOVBUreg {
  2676  			break
  2677  		}
  2678  		v.reset(OpMIPSMOVWreg)
  2679  		v.AddArg(x)
  2680  		return true
  2681  	}
  2682  	// match: (MOVBUreg <t> x:(MOVBload [off] {sym} ptr mem))
  2683  	// cond: x.Uses == 1 && clobber(x)
  2684  	// result: @x.Block (MOVBUload <t> [off] {sym} ptr mem)
  2685  	for {
  2686  		t := v.Type
  2687  		x := v_0
  2688  		if x.Op != OpMIPSMOVBload {
  2689  			break
  2690  		}
  2691  		off := auxIntToInt32(x.AuxInt)
  2692  		sym := auxToSym(x.Aux)
  2693  		mem := x.Args[1]
  2694  		ptr := x.Args[0]
  2695  		if !(x.Uses == 1 && clobber(x)) {
  2696  			break
  2697  		}
  2698  		b = x.Block
  2699  		v0 := b.NewValue0(x.Pos, OpMIPSMOVBUload, t)
  2700  		v.copyOf(v0)
  2701  		v0.AuxInt = int32ToAuxInt(off)
  2702  		v0.Aux = symToAux(sym)
  2703  		v0.AddArg2(ptr, mem)
  2704  		return true
  2705  	}
  2706  	// match: (MOVBUreg (ANDconst [c] x))
  2707  	// result: (ANDconst [c&0xff] x)
  2708  	for {
  2709  		if v_0.Op != OpMIPSANDconst {
  2710  			break
  2711  		}
  2712  		c := auxIntToInt32(v_0.AuxInt)
  2713  		x := v_0.Args[0]
  2714  		v.reset(OpMIPSANDconst)
  2715  		v.AuxInt = int32ToAuxInt(c & 0xff)
  2716  		v.AddArg(x)
  2717  		return true
  2718  	}
  2719  	// match: (MOVBUreg (MOVWconst [c]))
  2720  	// result: (MOVWconst [int32(uint8(c))])
  2721  	for {
  2722  		if v_0.Op != OpMIPSMOVWconst {
  2723  			break
  2724  		}
  2725  		c := auxIntToInt32(v_0.AuxInt)
  2726  		v.reset(OpMIPSMOVWconst)
  2727  		v.AuxInt = int32ToAuxInt(int32(uint8(c)))
  2728  		return true
  2729  	}
  2730  	return false
  2731  }
  2732  func rewriteValueMIPS_OpMIPSMOVBload(v *Value) bool {
  2733  	v_1 := v.Args[1]
  2734  	v_0 := v.Args[0]
  2735  	// match: (MOVBload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  2736  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  2737  	// result: (MOVBload [off1+off2] {sym} ptr mem)
  2738  	for {
  2739  		off1 := auxIntToInt32(v.AuxInt)
  2740  		sym := auxToSym(v.Aux)
  2741  		x := v_0
  2742  		if x.Op != OpMIPSADDconst {
  2743  			break
  2744  		}
  2745  		off2 := auxIntToInt32(x.AuxInt)
  2746  		ptr := x.Args[0]
  2747  		mem := v_1
  2748  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  2749  			break
  2750  		}
  2751  		v.reset(OpMIPSMOVBload)
  2752  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2753  		v.Aux = symToAux(sym)
  2754  		v.AddArg2(ptr, mem)
  2755  		return true
  2756  	}
  2757  	// match: (MOVBload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  2758  	// cond: canMergeSym(sym1,sym2)
  2759  	// result: (MOVBload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  2760  	for {
  2761  		off1 := auxIntToInt32(v.AuxInt)
  2762  		sym1 := auxToSym(v.Aux)
  2763  		if v_0.Op != OpMIPSMOVWaddr {
  2764  			break
  2765  		}
  2766  		off2 := auxIntToInt32(v_0.AuxInt)
  2767  		sym2 := auxToSym(v_0.Aux)
  2768  		ptr := v_0.Args[0]
  2769  		mem := v_1
  2770  		if !(canMergeSym(sym1, sym2)) {
  2771  			break
  2772  		}
  2773  		v.reset(OpMIPSMOVBload)
  2774  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2775  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2776  		v.AddArg2(ptr, mem)
  2777  		return true
  2778  	}
  2779  	// match: (MOVBload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _))
  2780  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  2781  	// result: (MOVBreg x)
  2782  	for {
  2783  		off := auxIntToInt32(v.AuxInt)
  2784  		sym := auxToSym(v.Aux)
  2785  		ptr := v_0
  2786  		if v_1.Op != OpMIPSMOVBstore {
  2787  			break
  2788  		}
  2789  		off2 := auxIntToInt32(v_1.AuxInt)
  2790  		sym2 := auxToSym(v_1.Aux)
  2791  		x := v_1.Args[1]
  2792  		ptr2 := v_1.Args[0]
  2793  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  2794  			break
  2795  		}
  2796  		v.reset(OpMIPSMOVBreg)
  2797  		v.AddArg(x)
  2798  		return true
  2799  	}
  2800  	return false
  2801  }
  2802  func rewriteValueMIPS_OpMIPSMOVBreg(v *Value) bool {
  2803  	v_0 := v.Args[0]
  2804  	b := v.Block
  2805  	// match: (MOVBreg x:(MOVBload _ _))
  2806  	// result: (MOVWreg x)
  2807  	for {
  2808  		x := v_0
  2809  		if x.Op != OpMIPSMOVBload {
  2810  			break
  2811  		}
  2812  		v.reset(OpMIPSMOVWreg)
  2813  		v.AddArg(x)
  2814  		return true
  2815  	}
  2816  	// match: (MOVBreg x:(MOVBreg _))
  2817  	// result: (MOVWreg x)
  2818  	for {
  2819  		x := v_0
  2820  		if x.Op != OpMIPSMOVBreg {
  2821  			break
  2822  		}
  2823  		v.reset(OpMIPSMOVWreg)
  2824  		v.AddArg(x)
  2825  		return true
  2826  	}
  2827  	// match: (MOVBreg <t> x:(MOVBUload [off] {sym} ptr mem))
  2828  	// cond: x.Uses == 1 && clobber(x)
  2829  	// result: @x.Block (MOVBload <t> [off] {sym} ptr mem)
  2830  	for {
  2831  		t := v.Type
  2832  		x := v_0
  2833  		if x.Op != OpMIPSMOVBUload {
  2834  			break
  2835  		}
  2836  		off := auxIntToInt32(x.AuxInt)
  2837  		sym := auxToSym(x.Aux)
  2838  		mem := x.Args[1]
  2839  		ptr := x.Args[0]
  2840  		if !(x.Uses == 1 && clobber(x)) {
  2841  			break
  2842  		}
  2843  		b = x.Block
  2844  		v0 := b.NewValue0(x.Pos, OpMIPSMOVBload, t)
  2845  		v.copyOf(v0)
  2846  		v0.AuxInt = int32ToAuxInt(off)
  2847  		v0.Aux = symToAux(sym)
  2848  		v0.AddArg2(ptr, mem)
  2849  		return true
  2850  	}
  2851  	// match: (MOVBreg (ANDconst [c] x))
  2852  	// cond: c & 0x80 == 0
  2853  	// result: (ANDconst [c&0x7f] x)
  2854  	for {
  2855  		if v_0.Op != OpMIPSANDconst {
  2856  			break
  2857  		}
  2858  		c := auxIntToInt32(v_0.AuxInt)
  2859  		x := v_0.Args[0]
  2860  		if !(c&0x80 == 0) {
  2861  			break
  2862  		}
  2863  		v.reset(OpMIPSANDconst)
  2864  		v.AuxInt = int32ToAuxInt(c & 0x7f)
  2865  		v.AddArg(x)
  2866  		return true
  2867  	}
  2868  	// match: (MOVBreg (MOVWconst [c]))
  2869  	// result: (MOVWconst [int32(int8(c))])
  2870  	for {
  2871  		if v_0.Op != OpMIPSMOVWconst {
  2872  			break
  2873  		}
  2874  		c := auxIntToInt32(v_0.AuxInt)
  2875  		v.reset(OpMIPSMOVWconst)
  2876  		v.AuxInt = int32ToAuxInt(int32(int8(c)))
  2877  		return true
  2878  	}
  2879  	return false
  2880  }
  2881  func rewriteValueMIPS_OpMIPSMOVBstore(v *Value) bool {
  2882  	v_2 := v.Args[2]
  2883  	v_1 := v.Args[1]
  2884  	v_0 := v.Args[0]
  2885  	// match: (MOVBstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  2886  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  2887  	// result: (MOVBstore [off1+off2] {sym} ptr val mem)
  2888  	for {
  2889  		off1 := auxIntToInt32(v.AuxInt)
  2890  		sym := auxToSym(v.Aux)
  2891  		x := v_0
  2892  		if x.Op != OpMIPSADDconst {
  2893  			break
  2894  		}
  2895  		off2 := auxIntToInt32(x.AuxInt)
  2896  		ptr := x.Args[0]
  2897  		val := v_1
  2898  		mem := v_2
  2899  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  2900  			break
  2901  		}
  2902  		v.reset(OpMIPSMOVBstore)
  2903  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2904  		v.Aux = symToAux(sym)
  2905  		v.AddArg3(ptr, val, mem)
  2906  		return true
  2907  	}
  2908  	// match: (MOVBstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  2909  	// cond: canMergeSym(sym1,sym2)
  2910  	// result: (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  2911  	for {
  2912  		off1 := auxIntToInt32(v.AuxInt)
  2913  		sym1 := auxToSym(v.Aux)
  2914  		if v_0.Op != OpMIPSMOVWaddr {
  2915  			break
  2916  		}
  2917  		off2 := auxIntToInt32(v_0.AuxInt)
  2918  		sym2 := auxToSym(v_0.Aux)
  2919  		ptr := v_0.Args[0]
  2920  		val := v_1
  2921  		mem := v_2
  2922  		if !(canMergeSym(sym1, sym2)) {
  2923  			break
  2924  		}
  2925  		v.reset(OpMIPSMOVBstore)
  2926  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2927  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2928  		v.AddArg3(ptr, val, mem)
  2929  		return true
  2930  	}
  2931  	// match: (MOVBstore [off] {sym} ptr (MOVWconst [0]) mem)
  2932  	// result: (MOVBstorezero [off] {sym} ptr mem)
  2933  	for {
  2934  		off := auxIntToInt32(v.AuxInt)
  2935  		sym := auxToSym(v.Aux)
  2936  		ptr := v_0
  2937  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  2938  			break
  2939  		}
  2940  		mem := v_2
  2941  		v.reset(OpMIPSMOVBstorezero)
  2942  		v.AuxInt = int32ToAuxInt(off)
  2943  		v.Aux = symToAux(sym)
  2944  		v.AddArg2(ptr, mem)
  2945  		return true
  2946  	}
  2947  	// match: (MOVBstore [off] {sym} ptr (MOVBreg x) mem)
  2948  	// result: (MOVBstore [off] {sym} ptr x mem)
  2949  	for {
  2950  		off := auxIntToInt32(v.AuxInt)
  2951  		sym := auxToSym(v.Aux)
  2952  		ptr := v_0
  2953  		if v_1.Op != OpMIPSMOVBreg {
  2954  			break
  2955  		}
  2956  		x := v_1.Args[0]
  2957  		mem := v_2
  2958  		v.reset(OpMIPSMOVBstore)
  2959  		v.AuxInt = int32ToAuxInt(off)
  2960  		v.Aux = symToAux(sym)
  2961  		v.AddArg3(ptr, x, mem)
  2962  		return true
  2963  	}
  2964  	// match: (MOVBstore [off] {sym} ptr (MOVBUreg x) mem)
  2965  	// result: (MOVBstore [off] {sym} ptr x mem)
  2966  	for {
  2967  		off := auxIntToInt32(v.AuxInt)
  2968  		sym := auxToSym(v.Aux)
  2969  		ptr := v_0
  2970  		if v_1.Op != OpMIPSMOVBUreg {
  2971  			break
  2972  		}
  2973  		x := v_1.Args[0]
  2974  		mem := v_2
  2975  		v.reset(OpMIPSMOVBstore)
  2976  		v.AuxInt = int32ToAuxInt(off)
  2977  		v.Aux = symToAux(sym)
  2978  		v.AddArg3(ptr, x, mem)
  2979  		return true
  2980  	}
  2981  	// match: (MOVBstore [off] {sym} ptr (MOVHreg x) mem)
  2982  	// result: (MOVBstore [off] {sym} ptr x mem)
  2983  	for {
  2984  		off := auxIntToInt32(v.AuxInt)
  2985  		sym := auxToSym(v.Aux)
  2986  		ptr := v_0
  2987  		if v_1.Op != OpMIPSMOVHreg {
  2988  			break
  2989  		}
  2990  		x := v_1.Args[0]
  2991  		mem := v_2
  2992  		v.reset(OpMIPSMOVBstore)
  2993  		v.AuxInt = int32ToAuxInt(off)
  2994  		v.Aux = symToAux(sym)
  2995  		v.AddArg3(ptr, x, mem)
  2996  		return true
  2997  	}
  2998  	// match: (MOVBstore [off] {sym} ptr (MOVHUreg x) mem)
  2999  	// result: (MOVBstore [off] {sym} ptr x mem)
  3000  	for {
  3001  		off := auxIntToInt32(v.AuxInt)
  3002  		sym := auxToSym(v.Aux)
  3003  		ptr := v_0
  3004  		if v_1.Op != OpMIPSMOVHUreg {
  3005  			break
  3006  		}
  3007  		x := v_1.Args[0]
  3008  		mem := v_2
  3009  		v.reset(OpMIPSMOVBstore)
  3010  		v.AuxInt = int32ToAuxInt(off)
  3011  		v.Aux = symToAux(sym)
  3012  		v.AddArg3(ptr, x, mem)
  3013  		return true
  3014  	}
  3015  	// match: (MOVBstore [off] {sym} ptr (MOVWreg x) mem)
  3016  	// result: (MOVBstore [off] {sym} ptr x mem)
  3017  	for {
  3018  		off := auxIntToInt32(v.AuxInt)
  3019  		sym := auxToSym(v.Aux)
  3020  		ptr := v_0
  3021  		if v_1.Op != OpMIPSMOVWreg {
  3022  			break
  3023  		}
  3024  		x := v_1.Args[0]
  3025  		mem := v_2
  3026  		v.reset(OpMIPSMOVBstore)
  3027  		v.AuxInt = int32ToAuxInt(off)
  3028  		v.Aux = symToAux(sym)
  3029  		v.AddArg3(ptr, x, mem)
  3030  		return true
  3031  	}
  3032  	return false
  3033  }
  3034  func rewriteValueMIPS_OpMIPSMOVBstorezero(v *Value) bool {
  3035  	v_1 := v.Args[1]
  3036  	v_0 := v.Args[0]
  3037  	// match: (MOVBstorezero [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3038  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3039  	// result: (MOVBstorezero [off1+off2] {sym} ptr mem)
  3040  	for {
  3041  		off1 := auxIntToInt32(v.AuxInt)
  3042  		sym := auxToSym(v.Aux)
  3043  		x := v_0
  3044  		if x.Op != OpMIPSADDconst {
  3045  			break
  3046  		}
  3047  		off2 := auxIntToInt32(x.AuxInt)
  3048  		ptr := x.Args[0]
  3049  		mem := v_1
  3050  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3051  			break
  3052  		}
  3053  		v.reset(OpMIPSMOVBstorezero)
  3054  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3055  		v.Aux = symToAux(sym)
  3056  		v.AddArg2(ptr, mem)
  3057  		return true
  3058  	}
  3059  	// match: (MOVBstorezero [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3060  	// cond: canMergeSym(sym1,sym2)
  3061  	// result: (MOVBstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3062  	for {
  3063  		off1 := auxIntToInt32(v.AuxInt)
  3064  		sym1 := auxToSym(v.Aux)
  3065  		if v_0.Op != OpMIPSMOVWaddr {
  3066  			break
  3067  		}
  3068  		off2 := auxIntToInt32(v_0.AuxInt)
  3069  		sym2 := auxToSym(v_0.Aux)
  3070  		ptr := v_0.Args[0]
  3071  		mem := v_1
  3072  		if !(canMergeSym(sym1, sym2)) {
  3073  			break
  3074  		}
  3075  		v.reset(OpMIPSMOVBstorezero)
  3076  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3077  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3078  		v.AddArg2(ptr, mem)
  3079  		return true
  3080  	}
  3081  	return false
  3082  }
  3083  func rewriteValueMIPS_OpMIPSMOVDload(v *Value) bool {
  3084  	v_1 := v.Args[1]
  3085  	v_0 := v.Args[0]
  3086  	// match: (MOVDload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3087  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3088  	// result: (MOVDload [off1+off2] {sym} ptr mem)
  3089  	for {
  3090  		off1 := auxIntToInt32(v.AuxInt)
  3091  		sym := auxToSym(v.Aux)
  3092  		x := v_0
  3093  		if x.Op != OpMIPSADDconst {
  3094  			break
  3095  		}
  3096  		off2 := auxIntToInt32(x.AuxInt)
  3097  		ptr := x.Args[0]
  3098  		mem := v_1
  3099  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3100  			break
  3101  		}
  3102  		v.reset(OpMIPSMOVDload)
  3103  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3104  		v.Aux = symToAux(sym)
  3105  		v.AddArg2(ptr, mem)
  3106  		return true
  3107  	}
  3108  	// match: (MOVDload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3109  	// cond: canMergeSym(sym1,sym2)
  3110  	// result: (MOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3111  	for {
  3112  		off1 := auxIntToInt32(v.AuxInt)
  3113  		sym1 := auxToSym(v.Aux)
  3114  		if v_0.Op != OpMIPSMOVWaddr {
  3115  			break
  3116  		}
  3117  		off2 := auxIntToInt32(v_0.AuxInt)
  3118  		sym2 := auxToSym(v_0.Aux)
  3119  		ptr := v_0.Args[0]
  3120  		mem := v_1
  3121  		if !(canMergeSym(sym1, sym2)) {
  3122  			break
  3123  		}
  3124  		v.reset(OpMIPSMOVDload)
  3125  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3126  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3127  		v.AddArg2(ptr, mem)
  3128  		return true
  3129  	}
  3130  	// match: (MOVDload [off] {sym} ptr (MOVDstore [off2] {sym2} ptr2 x _))
  3131  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  3132  	// result: x
  3133  	for {
  3134  		off := auxIntToInt32(v.AuxInt)
  3135  		sym := auxToSym(v.Aux)
  3136  		ptr := v_0
  3137  		if v_1.Op != OpMIPSMOVDstore {
  3138  			break
  3139  		}
  3140  		off2 := auxIntToInt32(v_1.AuxInt)
  3141  		sym2 := auxToSym(v_1.Aux)
  3142  		x := v_1.Args[1]
  3143  		ptr2 := v_1.Args[0]
  3144  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  3145  			break
  3146  		}
  3147  		v.copyOf(x)
  3148  		return true
  3149  	}
  3150  	return false
  3151  }
  3152  func rewriteValueMIPS_OpMIPSMOVDstore(v *Value) bool {
  3153  	v_2 := v.Args[2]
  3154  	v_1 := v.Args[1]
  3155  	v_0 := v.Args[0]
  3156  	// match: (MOVDstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  3157  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3158  	// result: (MOVDstore [off1+off2] {sym} ptr val mem)
  3159  	for {
  3160  		off1 := auxIntToInt32(v.AuxInt)
  3161  		sym := auxToSym(v.Aux)
  3162  		x := v_0
  3163  		if x.Op != OpMIPSADDconst {
  3164  			break
  3165  		}
  3166  		off2 := auxIntToInt32(x.AuxInt)
  3167  		ptr := x.Args[0]
  3168  		val := v_1
  3169  		mem := v_2
  3170  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3171  			break
  3172  		}
  3173  		v.reset(OpMIPSMOVDstore)
  3174  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3175  		v.Aux = symToAux(sym)
  3176  		v.AddArg3(ptr, val, mem)
  3177  		return true
  3178  	}
  3179  	// match: (MOVDstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  3180  	// cond: canMergeSym(sym1,sym2)
  3181  	// result: (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  3182  	for {
  3183  		off1 := auxIntToInt32(v.AuxInt)
  3184  		sym1 := auxToSym(v.Aux)
  3185  		if v_0.Op != OpMIPSMOVWaddr {
  3186  			break
  3187  		}
  3188  		off2 := auxIntToInt32(v_0.AuxInt)
  3189  		sym2 := auxToSym(v_0.Aux)
  3190  		ptr := v_0.Args[0]
  3191  		val := v_1
  3192  		mem := v_2
  3193  		if !(canMergeSym(sym1, sym2)) {
  3194  			break
  3195  		}
  3196  		v.reset(OpMIPSMOVDstore)
  3197  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3198  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3199  		v.AddArg3(ptr, val, mem)
  3200  		return true
  3201  	}
  3202  	return false
  3203  }
  3204  func rewriteValueMIPS_OpMIPSMOVFload(v *Value) bool {
  3205  	v_1 := v.Args[1]
  3206  	v_0 := v.Args[0]
  3207  	// match: (MOVFload [off] {sym} ptr (MOVWstore [off] {sym} ptr val _))
  3208  	// result: (MOVWgpfp val)
  3209  	for {
  3210  		off := auxIntToInt32(v.AuxInt)
  3211  		sym := auxToSym(v.Aux)
  3212  		ptr := v_0
  3213  		if v_1.Op != OpMIPSMOVWstore || auxIntToInt32(v_1.AuxInt) != off || auxToSym(v_1.Aux) != sym {
  3214  			break
  3215  		}
  3216  		val := v_1.Args[1]
  3217  		if ptr != v_1.Args[0] {
  3218  			break
  3219  		}
  3220  		v.reset(OpMIPSMOVWgpfp)
  3221  		v.AddArg(val)
  3222  		return true
  3223  	}
  3224  	// match: (MOVFload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3225  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3226  	// result: (MOVFload [off1+off2] {sym} ptr mem)
  3227  	for {
  3228  		off1 := auxIntToInt32(v.AuxInt)
  3229  		sym := auxToSym(v.Aux)
  3230  		x := v_0
  3231  		if x.Op != OpMIPSADDconst {
  3232  			break
  3233  		}
  3234  		off2 := auxIntToInt32(x.AuxInt)
  3235  		ptr := x.Args[0]
  3236  		mem := v_1
  3237  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3238  			break
  3239  		}
  3240  		v.reset(OpMIPSMOVFload)
  3241  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3242  		v.Aux = symToAux(sym)
  3243  		v.AddArg2(ptr, mem)
  3244  		return true
  3245  	}
  3246  	// match: (MOVFload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3247  	// cond: canMergeSym(sym1,sym2)
  3248  	// result: (MOVFload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3249  	for {
  3250  		off1 := auxIntToInt32(v.AuxInt)
  3251  		sym1 := auxToSym(v.Aux)
  3252  		if v_0.Op != OpMIPSMOVWaddr {
  3253  			break
  3254  		}
  3255  		off2 := auxIntToInt32(v_0.AuxInt)
  3256  		sym2 := auxToSym(v_0.Aux)
  3257  		ptr := v_0.Args[0]
  3258  		mem := v_1
  3259  		if !(canMergeSym(sym1, sym2)) {
  3260  			break
  3261  		}
  3262  		v.reset(OpMIPSMOVFload)
  3263  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3264  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3265  		v.AddArg2(ptr, mem)
  3266  		return true
  3267  	}
  3268  	// match: (MOVFload [off] {sym} ptr (MOVFstore [off2] {sym2} ptr2 x _))
  3269  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  3270  	// result: x
  3271  	for {
  3272  		off := auxIntToInt32(v.AuxInt)
  3273  		sym := auxToSym(v.Aux)
  3274  		ptr := v_0
  3275  		if v_1.Op != OpMIPSMOVFstore {
  3276  			break
  3277  		}
  3278  		off2 := auxIntToInt32(v_1.AuxInt)
  3279  		sym2 := auxToSym(v_1.Aux)
  3280  		x := v_1.Args[1]
  3281  		ptr2 := v_1.Args[0]
  3282  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  3283  			break
  3284  		}
  3285  		v.copyOf(x)
  3286  		return true
  3287  	}
  3288  	return false
  3289  }
  3290  func rewriteValueMIPS_OpMIPSMOVFstore(v *Value) bool {
  3291  	v_2 := v.Args[2]
  3292  	v_1 := v.Args[1]
  3293  	v_0 := v.Args[0]
  3294  	// match: (MOVFstore [off] {sym} ptr (MOVWgpfp val) mem)
  3295  	// result: (MOVWstore [off] {sym} ptr val mem)
  3296  	for {
  3297  		off := auxIntToInt32(v.AuxInt)
  3298  		sym := auxToSym(v.Aux)
  3299  		ptr := v_0
  3300  		if v_1.Op != OpMIPSMOVWgpfp {
  3301  			break
  3302  		}
  3303  		val := v_1.Args[0]
  3304  		mem := v_2
  3305  		v.reset(OpMIPSMOVWstore)
  3306  		v.AuxInt = int32ToAuxInt(off)
  3307  		v.Aux = symToAux(sym)
  3308  		v.AddArg3(ptr, val, mem)
  3309  		return true
  3310  	}
  3311  	// match: (MOVFstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  3312  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3313  	// result: (MOVFstore [off1+off2] {sym} ptr val mem)
  3314  	for {
  3315  		off1 := auxIntToInt32(v.AuxInt)
  3316  		sym := auxToSym(v.Aux)
  3317  		x := v_0
  3318  		if x.Op != OpMIPSADDconst {
  3319  			break
  3320  		}
  3321  		off2 := auxIntToInt32(x.AuxInt)
  3322  		ptr := x.Args[0]
  3323  		val := v_1
  3324  		mem := v_2
  3325  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3326  			break
  3327  		}
  3328  		v.reset(OpMIPSMOVFstore)
  3329  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3330  		v.Aux = symToAux(sym)
  3331  		v.AddArg3(ptr, val, mem)
  3332  		return true
  3333  	}
  3334  	// match: (MOVFstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  3335  	// cond: canMergeSym(sym1,sym2)
  3336  	// result: (MOVFstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  3337  	for {
  3338  		off1 := auxIntToInt32(v.AuxInt)
  3339  		sym1 := auxToSym(v.Aux)
  3340  		if v_0.Op != OpMIPSMOVWaddr {
  3341  			break
  3342  		}
  3343  		off2 := auxIntToInt32(v_0.AuxInt)
  3344  		sym2 := auxToSym(v_0.Aux)
  3345  		ptr := v_0.Args[0]
  3346  		val := v_1
  3347  		mem := v_2
  3348  		if !(canMergeSym(sym1, sym2)) {
  3349  			break
  3350  		}
  3351  		v.reset(OpMIPSMOVFstore)
  3352  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3353  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3354  		v.AddArg3(ptr, val, mem)
  3355  		return true
  3356  	}
  3357  	return false
  3358  }
  3359  func rewriteValueMIPS_OpMIPSMOVHUload(v *Value) bool {
  3360  	v_1 := v.Args[1]
  3361  	v_0 := v.Args[0]
  3362  	// match: (MOVHUload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3363  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3364  	// result: (MOVHUload [off1+off2] {sym} ptr mem)
  3365  	for {
  3366  		off1 := auxIntToInt32(v.AuxInt)
  3367  		sym := auxToSym(v.Aux)
  3368  		x := v_0
  3369  		if x.Op != OpMIPSADDconst {
  3370  			break
  3371  		}
  3372  		off2 := auxIntToInt32(x.AuxInt)
  3373  		ptr := x.Args[0]
  3374  		mem := v_1
  3375  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3376  			break
  3377  		}
  3378  		v.reset(OpMIPSMOVHUload)
  3379  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3380  		v.Aux = symToAux(sym)
  3381  		v.AddArg2(ptr, mem)
  3382  		return true
  3383  	}
  3384  	// match: (MOVHUload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3385  	// cond: canMergeSym(sym1,sym2)
  3386  	// result: (MOVHUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3387  	for {
  3388  		off1 := auxIntToInt32(v.AuxInt)
  3389  		sym1 := auxToSym(v.Aux)
  3390  		if v_0.Op != OpMIPSMOVWaddr {
  3391  			break
  3392  		}
  3393  		off2 := auxIntToInt32(v_0.AuxInt)
  3394  		sym2 := auxToSym(v_0.Aux)
  3395  		ptr := v_0.Args[0]
  3396  		mem := v_1
  3397  		if !(canMergeSym(sym1, sym2)) {
  3398  			break
  3399  		}
  3400  		v.reset(OpMIPSMOVHUload)
  3401  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3402  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3403  		v.AddArg2(ptr, mem)
  3404  		return true
  3405  	}
  3406  	// match: (MOVHUload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _))
  3407  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  3408  	// result: (MOVHUreg x)
  3409  	for {
  3410  		off := auxIntToInt32(v.AuxInt)
  3411  		sym := auxToSym(v.Aux)
  3412  		ptr := v_0
  3413  		if v_1.Op != OpMIPSMOVHstore {
  3414  			break
  3415  		}
  3416  		off2 := auxIntToInt32(v_1.AuxInt)
  3417  		sym2 := auxToSym(v_1.Aux)
  3418  		x := v_1.Args[1]
  3419  		ptr2 := v_1.Args[0]
  3420  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  3421  			break
  3422  		}
  3423  		v.reset(OpMIPSMOVHUreg)
  3424  		v.AddArg(x)
  3425  		return true
  3426  	}
  3427  	return false
  3428  }
  3429  func rewriteValueMIPS_OpMIPSMOVHUreg(v *Value) bool {
  3430  	v_0 := v.Args[0]
  3431  	b := v.Block
  3432  	// match: (MOVHUreg x:(MOVBUload _ _))
  3433  	// result: (MOVWreg x)
  3434  	for {
  3435  		x := v_0
  3436  		if x.Op != OpMIPSMOVBUload {
  3437  			break
  3438  		}
  3439  		v.reset(OpMIPSMOVWreg)
  3440  		v.AddArg(x)
  3441  		return true
  3442  	}
  3443  	// match: (MOVHUreg x:(MOVHUload _ _))
  3444  	// result: (MOVWreg x)
  3445  	for {
  3446  		x := v_0
  3447  		if x.Op != OpMIPSMOVHUload {
  3448  			break
  3449  		}
  3450  		v.reset(OpMIPSMOVWreg)
  3451  		v.AddArg(x)
  3452  		return true
  3453  	}
  3454  	// match: (MOVHUreg x:(MOVBUreg _))
  3455  	// result: (MOVWreg x)
  3456  	for {
  3457  		x := v_0
  3458  		if x.Op != OpMIPSMOVBUreg {
  3459  			break
  3460  		}
  3461  		v.reset(OpMIPSMOVWreg)
  3462  		v.AddArg(x)
  3463  		return true
  3464  	}
  3465  	// match: (MOVHUreg x:(MOVHUreg _))
  3466  	// result: (MOVWreg x)
  3467  	for {
  3468  		x := v_0
  3469  		if x.Op != OpMIPSMOVHUreg {
  3470  			break
  3471  		}
  3472  		v.reset(OpMIPSMOVWreg)
  3473  		v.AddArg(x)
  3474  		return true
  3475  	}
  3476  	// match: (MOVHUreg <t> x:(MOVHload [off] {sym} ptr mem))
  3477  	// cond: x.Uses == 1 && clobber(x)
  3478  	// result: @x.Block (MOVHUload <t> [off] {sym} ptr mem)
  3479  	for {
  3480  		t := v.Type
  3481  		x := v_0
  3482  		if x.Op != OpMIPSMOVHload {
  3483  			break
  3484  		}
  3485  		off := auxIntToInt32(x.AuxInt)
  3486  		sym := auxToSym(x.Aux)
  3487  		mem := x.Args[1]
  3488  		ptr := x.Args[0]
  3489  		if !(x.Uses == 1 && clobber(x)) {
  3490  			break
  3491  		}
  3492  		b = x.Block
  3493  		v0 := b.NewValue0(x.Pos, OpMIPSMOVHUload, t)
  3494  		v.copyOf(v0)
  3495  		v0.AuxInt = int32ToAuxInt(off)
  3496  		v0.Aux = symToAux(sym)
  3497  		v0.AddArg2(ptr, mem)
  3498  		return true
  3499  	}
  3500  	// match: (MOVHUreg (ANDconst [c] x))
  3501  	// result: (ANDconst [c&0xffff] x)
  3502  	for {
  3503  		if v_0.Op != OpMIPSANDconst {
  3504  			break
  3505  		}
  3506  		c := auxIntToInt32(v_0.AuxInt)
  3507  		x := v_0.Args[0]
  3508  		v.reset(OpMIPSANDconst)
  3509  		v.AuxInt = int32ToAuxInt(c & 0xffff)
  3510  		v.AddArg(x)
  3511  		return true
  3512  	}
  3513  	// match: (MOVHUreg (MOVWconst [c]))
  3514  	// result: (MOVWconst [int32(uint16(c))])
  3515  	for {
  3516  		if v_0.Op != OpMIPSMOVWconst {
  3517  			break
  3518  		}
  3519  		c := auxIntToInt32(v_0.AuxInt)
  3520  		v.reset(OpMIPSMOVWconst)
  3521  		v.AuxInt = int32ToAuxInt(int32(uint16(c)))
  3522  		return true
  3523  	}
  3524  	return false
  3525  }
  3526  func rewriteValueMIPS_OpMIPSMOVHload(v *Value) bool {
  3527  	v_1 := v.Args[1]
  3528  	v_0 := v.Args[0]
  3529  	// match: (MOVHload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3530  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3531  	// result: (MOVHload [off1+off2] {sym} ptr mem)
  3532  	for {
  3533  		off1 := auxIntToInt32(v.AuxInt)
  3534  		sym := auxToSym(v.Aux)
  3535  		x := v_0
  3536  		if x.Op != OpMIPSADDconst {
  3537  			break
  3538  		}
  3539  		off2 := auxIntToInt32(x.AuxInt)
  3540  		ptr := x.Args[0]
  3541  		mem := v_1
  3542  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3543  			break
  3544  		}
  3545  		v.reset(OpMIPSMOVHload)
  3546  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3547  		v.Aux = symToAux(sym)
  3548  		v.AddArg2(ptr, mem)
  3549  		return true
  3550  	}
  3551  	// match: (MOVHload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3552  	// cond: canMergeSym(sym1,sym2)
  3553  	// result: (MOVHload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3554  	for {
  3555  		off1 := auxIntToInt32(v.AuxInt)
  3556  		sym1 := auxToSym(v.Aux)
  3557  		if v_0.Op != OpMIPSMOVWaddr {
  3558  			break
  3559  		}
  3560  		off2 := auxIntToInt32(v_0.AuxInt)
  3561  		sym2 := auxToSym(v_0.Aux)
  3562  		ptr := v_0.Args[0]
  3563  		mem := v_1
  3564  		if !(canMergeSym(sym1, sym2)) {
  3565  			break
  3566  		}
  3567  		v.reset(OpMIPSMOVHload)
  3568  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3569  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3570  		v.AddArg2(ptr, mem)
  3571  		return true
  3572  	}
  3573  	// match: (MOVHload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _))
  3574  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  3575  	// result: (MOVHreg x)
  3576  	for {
  3577  		off := auxIntToInt32(v.AuxInt)
  3578  		sym := auxToSym(v.Aux)
  3579  		ptr := v_0
  3580  		if v_1.Op != OpMIPSMOVHstore {
  3581  			break
  3582  		}
  3583  		off2 := auxIntToInt32(v_1.AuxInt)
  3584  		sym2 := auxToSym(v_1.Aux)
  3585  		x := v_1.Args[1]
  3586  		ptr2 := v_1.Args[0]
  3587  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  3588  			break
  3589  		}
  3590  		v.reset(OpMIPSMOVHreg)
  3591  		v.AddArg(x)
  3592  		return true
  3593  	}
  3594  	return false
  3595  }
  3596  func rewriteValueMIPS_OpMIPSMOVHreg(v *Value) bool {
  3597  	v_0 := v.Args[0]
  3598  	b := v.Block
  3599  	// match: (MOVHreg x:(MOVBload _ _))
  3600  	// result: (MOVWreg x)
  3601  	for {
  3602  		x := v_0
  3603  		if x.Op != OpMIPSMOVBload {
  3604  			break
  3605  		}
  3606  		v.reset(OpMIPSMOVWreg)
  3607  		v.AddArg(x)
  3608  		return true
  3609  	}
  3610  	// match: (MOVHreg x:(MOVBUload _ _))
  3611  	// result: (MOVWreg x)
  3612  	for {
  3613  		x := v_0
  3614  		if x.Op != OpMIPSMOVBUload {
  3615  			break
  3616  		}
  3617  		v.reset(OpMIPSMOVWreg)
  3618  		v.AddArg(x)
  3619  		return true
  3620  	}
  3621  	// match: (MOVHreg x:(MOVHload _ _))
  3622  	// result: (MOVWreg x)
  3623  	for {
  3624  		x := v_0
  3625  		if x.Op != OpMIPSMOVHload {
  3626  			break
  3627  		}
  3628  		v.reset(OpMIPSMOVWreg)
  3629  		v.AddArg(x)
  3630  		return true
  3631  	}
  3632  	// match: (MOVHreg x:(MOVBreg _))
  3633  	// result: (MOVWreg x)
  3634  	for {
  3635  		x := v_0
  3636  		if x.Op != OpMIPSMOVBreg {
  3637  			break
  3638  		}
  3639  		v.reset(OpMIPSMOVWreg)
  3640  		v.AddArg(x)
  3641  		return true
  3642  	}
  3643  	// match: (MOVHreg x:(MOVBUreg _))
  3644  	// result: (MOVWreg x)
  3645  	for {
  3646  		x := v_0
  3647  		if x.Op != OpMIPSMOVBUreg {
  3648  			break
  3649  		}
  3650  		v.reset(OpMIPSMOVWreg)
  3651  		v.AddArg(x)
  3652  		return true
  3653  	}
  3654  	// match: (MOVHreg x:(MOVHreg _))
  3655  	// result: (MOVWreg x)
  3656  	for {
  3657  		x := v_0
  3658  		if x.Op != OpMIPSMOVHreg {
  3659  			break
  3660  		}
  3661  		v.reset(OpMIPSMOVWreg)
  3662  		v.AddArg(x)
  3663  		return true
  3664  	}
  3665  	// match: (MOVHreg <t> x:(MOVHUload [off] {sym} ptr mem))
  3666  	// cond: x.Uses == 1 && clobber(x)
  3667  	// result: @x.Block (MOVHload <t> [off] {sym} ptr mem)
  3668  	for {
  3669  		t := v.Type
  3670  		x := v_0
  3671  		if x.Op != OpMIPSMOVHUload {
  3672  			break
  3673  		}
  3674  		off := auxIntToInt32(x.AuxInt)
  3675  		sym := auxToSym(x.Aux)
  3676  		mem := x.Args[1]
  3677  		ptr := x.Args[0]
  3678  		if !(x.Uses == 1 && clobber(x)) {
  3679  			break
  3680  		}
  3681  		b = x.Block
  3682  		v0 := b.NewValue0(x.Pos, OpMIPSMOVHload, t)
  3683  		v.copyOf(v0)
  3684  		v0.AuxInt = int32ToAuxInt(off)
  3685  		v0.Aux = symToAux(sym)
  3686  		v0.AddArg2(ptr, mem)
  3687  		return true
  3688  	}
  3689  	// match: (MOVHreg (ANDconst [c] x))
  3690  	// cond: c & 0x8000 == 0
  3691  	// result: (ANDconst [c&0x7fff] x)
  3692  	for {
  3693  		if v_0.Op != OpMIPSANDconst {
  3694  			break
  3695  		}
  3696  		c := auxIntToInt32(v_0.AuxInt)
  3697  		x := v_0.Args[0]
  3698  		if !(c&0x8000 == 0) {
  3699  			break
  3700  		}
  3701  		v.reset(OpMIPSANDconst)
  3702  		v.AuxInt = int32ToAuxInt(c & 0x7fff)
  3703  		v.AddArg(x)
  3704  		return true
  3705  	}
  3706  	// match: (MOVHreg (MOVWconst [c]))
  3707  	// result: (MOVWconst [int32(int16(c))])
  3708  	for {
  3709  		if v_0.Op != OpMIPSMOVWconst {
  3710  			break
  3711  		}
  3712  		c := auxIntToInt32(v_0.AuxInt)
  3713  		v.reset(OpMIPSMOVWconst)
  3714  		v.AuxInt = int32ToAuxInt(int32(int16(c)))
  3715  		return true
  3716  	}
  3717  	return false
  3718  }
  3719  func rewriteValueMIPS_OpMIPSMOVHstore(v *Value) bool {
  3720  	v_2 := v.Args[2]
  3721  	v_1 := v.Args[1]
  3722  	v_0 := v.Args[0]
  3723  	// match: (MOVHstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  3724  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3725  	// result: (MOVHstore [off1+off2] {sym} ptr val mem)
  3726  	for {
  3727  		off1 := auxIntToInt32(v.AuxInt)
  3728  		sym := auxToSym(v.Aux)
  3729  		x := v_0
  3730  		if x.Op != OpMIPSADDconst {
  3731  			break
  3732  		}
  3733  		off2 := auxIntToInt32(x.AuxInt)
  3734  		ptr := x.Args[0]
  3735  		val := v_1
  3736  		mem := v_2
  3737  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3738  			break
  3739  		}
  3740  		v.reset(OpMIPSMOVHstore)
  3741  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3742  		v.Aux = symToAux(sym)
  3743  		v.AddArg3(ptr, val, mem)
  3744  		return true
  3745  	}
  3746  	// match: (MOVHstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  3747  	// cond: canMergeSym(sym1,sym2)
  3748  	// result: (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  3749  	for {
  3750  		off1 := auxIntToInt32(v.AuxInt)
  3751  		sym1 := auxToSym(v.Aux)
  3752  		if v_0.Op != OpMIPSMOVWaddr {
  3753  			break
  3754  		}
  3755  		off2 := auxIntToInt32(v_0.AuxInt)
  3756  		sym2 := auxToSym(v_0.Aux)
  3757  		ptr := v_0.Args[0]
  3758  		val := v_1
  3759  		mem := v_2
  3760  		if !(canMergeSym(sym1, sym2)) {
  3761  			break
  3762  		}
  3763  		v.reset(OpMIPSMOVHstore)
  3764  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3765  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3766  		v.AddArg3(ptr, val, mem)
  3767  		return true
  3768  	}
  3769  	// match: (MOVHstore [off] {sym} ptr (MOVWconst [0]) mem)
  3770  	// result: (MOVHstorezero [off] {sym} ptr mem)
  3771  	for {
  3772  		off := auxIntToInt32(v.AuxInt)
  3773  		sym := auxToSym(v.Aux)
  3774  		ptr := v_0
  3775  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  3776  			break
  3777  		}
  3778  		mem := v_2
  3779  		v.reset(OpMIPSMOVHstorezero)
  3780  		v.AuxInt = int32ToAuxInt(off)
  3781  		v.Aux = symToAux(sym)
  3782  		v.AddArg2(ptr, mem)
  3783  		return true
  3784  	}
  3785  	// match: (MOVHstore [off] {sym} ptr (MOVHreg x) mem)
  3786  	// result: (MOVHstore [off] {sym} ptr x mem)
  3787  	for {
  3788  		off := auxIntToInt32(v.AuxInt)
  3789  		sym := auxToSym(v.Aux)
  3790  		ptr := v_0
  3791  		if v_1.Op != OpMIPSMOVHreg {
  3792  			break
  3793  		}
  3794  		x := v_1.Args[0]
  3795  		mem := v_2
  3796  		v.reset(OpMIPSMOVHstore)
  3797  		v.AuxInt = int32ToAuxInt(off)
  3798  		v.Aux = symToAux(sym)
  3799  		v.AddArg3(ptr, x, mem)
  3800  		return true
  3801  	}
  3802  	// match: (MOVHstore [off] {sym} ptr (MOVHUreg x) mem)
  3803  	// result: (MOVHstore [off] {sym} ptr x mem)
  3804  	for {
  3805  		off := auxIntToInt32(v.AuxInt)
  3806  		sym := auxToSym(v.Aux)
  3807  		ptr := v_0
  3808  		if v_1.Op != OpMIPSMOVHUreg {
  3809  			break
  3810  		}
  3811  		x := v_1.Args[0]
  3812  		mem := v_2
  3813  		v.reset(OpMIPSMOVHstore)
  3814  		v.AuxInt = int32ToAuxInt(off)
  3815  		v.Aux = symToAux(sym)
  3816  		v.AddArg3(ptr, x, mem)
  3817  		return true
  3818  	}
  3819  	// match: (MOVHstore [off] {sym} ptr (MOVWreg x) mem)
  3820  	// result: (MOVHstore [off] {sym} ptr x mem)
  3821  	for {
  3822  		off := auxIntToInt32(v.AuxInt)
  3823  		sym := auxToSym(v.Aux)
  3824  		ptr := v_0
  3825  		if v_1.Op != OpMIPSMOVWreg {
  3826  			break
  3827  		}
  3828  		x := v_1.Args[0]
  3829  		mem := v_2
  3830  		v.reset(OpMIPSMOVHstore)
  3831  		v.AuxInt = int32ToAuxInt(off)
  3832  		v.Aux = symToAux(sym)
  3833  		v.AddArg3(ptr, x, mem)
  3834  		return true
  3835  	}
  3836  	return false
  3837  }
  3838  func rewriteValueMIPS_OpMIPSMOVHstorezero(v *Value) bool {
  3839  	v_1 := v.Args[1]
  3840  	v_0 := v.Args[0]
  3841  	// match: (MOVHstorezero [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3842  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3843  	// result: (MOVHstorezero [off1+off2] {sym} ptr mem)
  3844  	for {
  3845  		off1 := auxIntToInt32(v.AuxInt)
  3846  		sym := auxToSym(v.Aux)
  3847  		x := v_0
  3848  		if x.Op != OpMIPSADDconst {
  3849  			break
  3850  		}
  3851  		off2 := auxIntToInt32(x.AuxInt)
  3852  		ptr := x.Args[0]
  3853  		mem := v_1
  3854  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3855  			break
  3856  		}
  3857  		v.reset(OpMIPSMOVHstorezero)
  3858  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3859  		v.Aux = symToAux(sym)
  3860  		v.AddArg2(ptr, mem)
  3861  		return true
  3862  	}
  3863  	// match: (MOVHstorezero [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3864  	// cond: canMergeSym(sym1,sym2)
  3865  	// result: (MOVHstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3866  	for {
  3867  		off1 := auxIntToInt32(v.AuxInt)
  3868  		sym1 := auxToSym(v.Aux)
  3869  		if v_0.Op != OpMIPSMOVWaddr {
  3870  			break
  3871  		}
  3872  		off2 := auxIntToInt32(v_0.AuxInt)
  3873  		sym2 := auxToSym(v_0.Aux)
  3874  		ptr := v_0.Args[0]
  3875  		mem := v_1
  3876  		if !(canMergeSym(sym1, sym2)) {
  3877  			break
  3878  		}
  3879  		v.reset(OpMIPSMOVHstorezero)
  3880  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3881  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3882  		v.AddArg2(ptr, mem)
  3883  		return true
  3884  	}
  3885  	return false
  3886  }
  3887  func rewriteValueMIPS_OpMIPSMOVWload(v *Value) bool {
  3888  	v_1 := v.Args[1]
  3889  	v_0 := v.Args[0]
  3890  	// match: (MOVWload [off] {sym} ptr (MOVFstore [off] {sym} ptr val _))
  3891  	// result: (MOVWfpgp val)
  3892  	for {
  3893  		off := auxIntToInt32(v.AuxInt)
  3894  		sym := auxToSym(v.Aux)
  3895  		ptr := v_0
  3896  		if v_1.Op != OpMIPSMOVFstore || auxIntToInt32(v_1.AuxInt) != off || auxToSym(v_1.Aux) != sym {
  3897  			break
  3898  		}
  3899  		val := v_1.Args[1]
  3900  		if ptr != v_1.Args[0] {
  3901  			break
  3902  		}
  3903  		v.reset(OpMIPSMOVWfpgp)
  3904  		v.AddArg(val)
  3905  		return true
  3906  	}
  3907  	// match: (MOVWload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3908  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3909  	// result: (MOVWload [off1+off2] {sym} ptr mem)
  3910  	for {
  3911  		off1 := auxIntToInt32(v.AuxInt)
  3912  		sym := auxToSym(v.Aux)
  3913  		x := v_0
  3914  		if x.Op != OpMIPSADDconst {
  3915  			break
  3916  		}
  3917  		off2 := auxIntToInt32(x.AuxInt)
  3918  		ptr := x.Args[0]
  3919  		mem := v_1
  3920  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3921  			break
  3922  		}
  3923  		v.reset(OpMIPSMOVWload)
  3924  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3925  		v.Aux = symToAux(sym)
  3926  		v.AddArg2(ptr, mem)
  3927  		return true
  3928  	}
  3929  	// match: (MOVWload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3930  	// cond: canMergeSym(sym1,sym2)
  3931  	// result: (MOVWload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3932  	for {
  3933  		off1 := auxIntToInt32(v.AuxInt)
  3934  		sym1 := auxToSym(v.Aux)
  3935  		if v_0.Op != OpMIPSMOVWaddr {
  3936  			break
  3937  		}
  3938  		off2 := auxIntToInt32(v_0.AuxInt)
  3939  		sym2 := auxToSym(v_0.Aux)
  3940  		ptr := v_0.Args[0]
  3941  		mem := v_1
  3942  		if !(canMergeSym(sym1, sym2)) {
  3943  			break
  3944  		}
  3945  		v.reset(OpMIPSMOVWload)
  3946  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3947  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3948  		v.AddArg2(ptr, mem)
  3949  		return true
  3950  	}
  3951  	// match: (MOVWload [off] {sym} ptr (MOVWstore [off2] {sym2} ptr2 x _))
  3952  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  3953  	// result: x
  3954  	for {
  3955  		off := auxIntToInt32(v.AuxInt)
  3956  		sym := auxToSym(v.Aux)
  3957  		ptr := v_0
  3958  		if v_1.Op != OpMIPSMOVWstore {
  3959  			break
  3960  		}
  3961  		off2 := auxIntToInt32(v_1.AuxInt)
  3962  		sym2 := auxToSym(v_1.Aux)
  3963  		x := v_1.Args[1]
  3964  		ptr2 := v_1.Args[0]
  3965  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  3966  			break
  3967  		}
  3968  		v.copyOf(x)
  3969  		return true
  3970  	}
  3971  	return false
  3972  }
  3973  func rewriteValueMIPS_OpMIPSMOVWnop(v *Value) bool {
  3974  	v_0 := v.Args[0]
  3975  	// match: (MOVWnop (MOVWconst [c]))
  3976  	// result: (MOVWconst [c])
  3977  	for {
  3978  		if v_0.Op != OpMIPSMOVWconst {
  3979  			break
  3980  		}
  3981  		c := auxIntToInt32(v_0.AuxInt)
  3982  		v.reset(OpMIPSMOVWconst)
  3983  		v.AuxInt = int32ToAuxInt(c)
  3984  		return true
  3985  	}
  3986  	return false
  3987  }
  3988  func rewriteValueMIPS_OpMIPSMOVWreg(v *Value) bool {
  3989  	v_0 := v.Args[0]
  3990  	// match: (MOVWreg x)
  3991  	// cond: x.Uses == 1
  3992  	// result: (MOVWnop x)
  3993  	for {
  3994  		x := v_0
  3995  		if !(x.Uses == 1) {
  3996  			break
  3997  		}
  3998  		v.reset(OpMIPSMOVWnop)
  3999  		v.AddArg(x)
  4000  		return true
  4001  	}
  4002  	// match: (MOVWreg (MOVWconst [c]))
  4003  	// result: (MOVWconst [c])
  4004  	for {
  4005  		if v_0.Op != OpMIPSMOVWconst {
  4006  			break
  4007  		}
  4008  		c := auxIntToInt32(v_0.AuxInt)
  4009  		v.reset(OpMIPSMOVWconst)
  4010  		v.AuxInt = int32ToAuxInt(c)
  4011  		return true
  4012  	}
  4013  	return false
  4014  }
  4015  func rewriteValueMIPS_OpMIPSMOVWstore(v *Value) bool {
  4016  	v_2 := v.Args[2]
  4017  	v_1 := v.Args[1]
  4018  	v_0 := v.Args[0]
  4019  	// match: (MOVWstore [off] {sym} ptr (MOVWfpgp val) mem)
  4020  	// result: (MOVFstore [off] {sym} ptr val mem)
  4021  	for {
  4022  		off := auxIntToInt32(v.AuxInt)
  4023  		sym := auxToSym(v.Aux)
  4024  		ptr := v_0
  4025  		if v_1.Op != OpMIPSMOVWfpgp {
  4026  			break
  4027  		}
  4028  		val := v_1.Args[0]
  4029  		mem := v_2
  4030  		v.reset(OpMIPSMOVFstore)
  4031  		v.AuxInt = int32ToAuxInt(off)
  4032  		v.Aux = symToAux(sym)
  4033  		v.AddArg3(ptr, val, mem)
  4034  		return true
  4035  	}
  4036  	// match: (MOVWstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  4037  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  4038  	// result: (MOVWstore [off1+off2] {sym} ptr val mem)
  4039  	for {
  4040  		off1 := auxIntToInt32(v.AuxInt)
  4041  		sym := auxToSym(v.Aux)
  4042  		x := v_0
  4043  		if x.Op != OpMIPSADDconst {
  4044  			break
  4045  		}
  4046  		off2 := auxIntToInt32(x.AuxInt)
  4047  		ptr := x.Args[0]
  4048  		val := v_1
  4049  		mem := v_2
  4050  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  4051  			break
  4052  		}
  4053  		v.reset(OpMIPSMOVWstore)
  4054  		v.AuxInt = int32ToAuxInt(off1 + off2)
  4055  		v.Aux = symToAux(sym)
  4056  		v.AddArg3(ptr, val, mem)
  4057  		return true
  4058  	}
  4059  	// match: (MOVWstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  4060  	// cond: canMergeSym(sym1,sym2)
  4061  	// result: (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  4062  	for {
  4063  		off1 := auxIntToInt32(v.AuxInt)
  4064  		sym1 := auxToSym(v.Aux)
  4065  		if v_0.Op != OpMIPSMOVWaddr {
  4066  			break
  4067  		}
  4068  		off2 := auxIntToInt32(v_0.AuxInt)
  4069  		sym2 := auxToSym(v_0.Aux)
  4070  		ptr := v_0.Args[0]
  4071  		val := v_1
  4072  		mem := v_2
  4073  		if !(canMergeSym(sym1, sym2)) {
  4074  			break
  4075  		}
  4076  		v.reset(OpMIPSMOVWstore)
  4077  		v.AuxInt = int32ToAuxInt(off1 + off2)
  4078  		v.Aux = symToAux(mergeSym(sym1, sym2))
  4079  		v.AddArg3(ptr, val, mem)
  4080  		return true
  4081  	}
  4082  	// match: (MOVWstore [off] {sym} ptr (MOVWconst [0]) mem)
  4083  	// result: (MOVWstorezero [off] {sym} ptr mem)
  4084  	for {
  4085  		off := auxIntToInt32(v.AuxInt)
  4086  		sym := auxToSym(v.Aux)
  4087  		ptr := v_0
  4088  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  4089  			break
  4090  		}
  4091  		mem := v_2
  4092  		v.reset(OpMIPSMOVWstorezero)
  4093  		v.AuxInt = int32ToAuxInt(off)
  4094  		v.Aux = symToAux(sym)
  4095  		v.AddArg2(ptr, mem)
  4096  		return true
  4097  	}
  4098  	// match: (MOVWstore [off] {sym} ptr (MOVWreg x) mem)
  4099  	// result: (MOVWstore [off] {sym} ptr x mem)
  4100  	for {
  4101  		off := auxIntToInt32(v.AuxInt)
  4102  		sym := auxToSym(v.Aux)
  4103  		ptr := v_0
  4104  		if v_1.Op != OpMIPSMOVWreg {
  4105  			break
  4106  		}
  4107  		x := v_1.Args[0]
  4108  		mem := v_2
  4109  		v.reset(OpMIPSMOVWstore)
  4110  		v.AuxInt = int32ToAuxInt(off)
  4111  		v.Aux = symToAux(sym)
  4112  		v.AddArg3(ptr, x, mem)
  4113  		return true
  4114  	}
  4115  	return false
  4116  }
  4117  func rewriteValueMIPS_OpMIPSMOVWstorezero(v *Value) bool {
  4118  	v_1 := v.Args[1]
  4119  	v_0 := v.Args[0]
  4120  	// match: (MOVWstorezero [off1] {sym} x:(ADDconst [off2] ptr) mem)
  4121  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  4122  	// result: (MOVWstorezero [off1+off2] {sym} ptr mem)
  4123  	for {
  4124  		off1 := auxIntToInt32(v.AuxInt)
  4125  		sym := auxToSym(v.Aux)
  4126  		x := v_0
  4127  		if x.Op != OpMIPSADDconst {
  4128  			break
  4129  		}
  4130  		off2 := auxIntToInt32(x.AuxInt)
  4131  		ptr := x.Args[0]
  4132  		mem := v_1
  4133  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  4134  			break
  4135  		}
  4136  		v.reset(OpMIPSMOVWstorezero)
  4137  		v.AuxInt = int32ToAuxInt(off1 + off2)
  4138  		v.Aux = symToAux(sym)
  4139  		v.AddArg2(ptr, mem)
  4140  		return true
  4141  	}
  4142  	// match: (MOVWstorezero [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  4143  	// cond: canMergeSym(sym1,sym2)
  4144  	// result: (MOVWstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  4145  	for {
  4146  		off1 := auxIntToInt32(v.AuxInt)
  4147  		sym1 := auxToSym(v.Aux)
  4148  		if v_0.Op != OpMIPSMOVWaddr {
  4149  			break
  4150  		}
  4151  		off2 := auxIntToInt32(v_0.AuxInt)
  4152  		sym2 := auxToSym(v_0.Aux)
  4153  		ptr := v_0.Args[0]
  4154  		mem := v_1
  4155  		if !(canMergeSym(sym1, sym2)) {
  4156  			break
  4157  		}
  4158  		v.reset(OpMIPSMOVWstorezero)
  4159  		v.AuxInt = int32ToAuxInt(off1 + off2)
  4160  		v.Aux = symToAux(mergeSym(sym1, sym2))
  4161  		v.AddArg2(ptr, mem)
  4162  		return true
  4163  	}
  4164  	return false
  4165  }
  4166  func rewriteValueMIPS_OpMIPSMUL(v *Value) bool {
  4167  	v_1 := v.Args[1]
  4168  	v_0 := v.Args[0]
  4169  	// match: (MUL (MOVWconst [0]) _ )
  4170  	// result: (MOVWconst [0])
  4171  	for {
  4172  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4173  			if v_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  4174  				continue
  4175  			}
  4176  			v.reset(OpMIPSMOVWconst)
  4177  			v.AuxInt = int32ToAuxInt(0)
  4178  			return true
  4179  		}
  4180  		break
  4181  	}
  4182  	// match: (MUL (MOVWconst [1]) x )
  4183  	// result: x
  4184  	for {
  4185  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4186  			if v_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0.AuxInt) != 1 {
  4187  				continue
  4188  			}
  4189  			x := v_1
  4190  			v.copyOf(x)
  4191  			return true
  4192  		}
  4193  		break
  4194  	}
  4195  	// match: (MUL (MOVWconst [-1]) x )
  4196  	// result: (NEG x)
  4197  	for {
  4198  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4199  			if v_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0.AuxInt) != -1 {
  4200  				continue
  4201  			}
  4202  			x := v_1
  4203  			v.reset(OpMIPSNEG)
  4204  			v.AddArg(x)
  4205  			return true
  4206  		}
  4207  		break
  4208  	}
  4209  	// match: (MUL (MOVWconst [c]) x )
  4210  	// cond: isPowerOfTwo(uint32(c))
  4211  	// result: (SLLconst [int32(log32u(uint32(c)))] x)
  4212  	for {
  4213  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4214  			if v_0.Op != OpMIPSMOVWconst {
  4215  				continue
  4216  			}
  4217  			c := auxIntToInt32(v_0.AuxInt)
  4218  			x := v_1
  4219  			if !(isPowerOfTwo(uint32(c))) {
  4220  				continue
  4221  			}
  4222  			v.reset(OpMIPSSLLconst)
  4223  			v.AuxInt = int32ToAuxInt(int32(log32u(uint32(c))))
  4224  			v.AddArg(x)
  4225  			return true
  4226  		}
  4227  		break
  4228  	}
  4229  	// match: (MUL (MOVWconst [c]) (MOVWconst [d]))
  4230  	// result: (MOVWconst [c*d])
  4231  	for {
  4232  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4233  			if v_0.Op != OpMIPSMOVWconst {
  4234  				continue
  4235  			}
  4236  			c := auxIntToInt32(v_0.AuxInt)
  4237  			if v_1.Op != OpMIPSMOVWconst {
  4238  				continue
  4239  			}
  4240  			d := auxIntToInt32(v_1.AuxInt)
  4241  			v.reset(OpMIPSMOVWconst)
  4242  			v.AuxInt = int32ToAuxInt(c * d)
  4243  			return true
  4244  		}
  4245  		break
  4246  	}
  4247  	return false
  4248  }
  4249  func rewriteValueMIPS_OpMIPSNEG(v *Value) bool {
  4250  	v_0 := v.Args[0]
  4251  	// match: (NEG (SUB x y))
  4252  	// result: (SUB y x)
  4253  	for {
  4254  		if v_0.Op != OpMIPSSUB {
  4255  			break
  4256  		}
  4257  		y := v_0.Args[1]
  4258  		x := v_0.Args[0]
  4259  		v.reset(OpMIPSSUB)
  4260  		v.AddArg2(y, x)
  4261  		return true
  4262  	}
  4263  	// match: (NEG (NEG x))
  4264  	// result: x
  4265  	for {
  4266  		if v_0.Op != OpMIPSNEG {
  4267  			break
  4268  		}
  4269  		x := v_0.Args[0]
  4270  		v.copyOf(x)
  4271  		return true
  4272  	}
  4273  	// match: (NEG (MOVWconst [c]))
  4274  	// result: (MOVWconst [-c])
  4275  	for {
  4276  		if v_0.Op != OpMIPSMOVWconst {
  4277  			break
  4278  		}
  4279  		c := auxIntToInt32(v_0.AuxInt)
  4280  		v.reset(OpMIPSMOVWconst)
  4281  		v.AuxInt = int32ToAuxInt(-c)
  4282  		return true
  4283  	}
  4284  	return false
  4285  }
  4286  func rewriteValueMIPS_OpMIPSOR(v *Value) bool {
  4287  	v_1 := v.Args[1]
  4288  	v_0 := v.Args[0]
  4289  	b := v.Block
  4290  	// match: (OR x (MOVWconst [c]))
  4291  	// result: (ORconst [c] x)
  4292  	for {
  4293  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4294  			x := v_0
  4295  			if v_1.Op != OpMIPSMOVWconst {
  4296  				continue
  4297  			}
  4298  			c := auxIntToInt32(v_1.AuxInt)
  4299  			v.reset(OpMIPSORconst)
  4300  			v.AuxInt = int32ToAuxInt(c)
  4301  			v.AddArg(x)
  4302  			return true
  4303  		}
  4304  		break
  4305  	}
  4306  	// match: (OR x x)
  4307  	// result: x
  4308  	for {
  4309  		x := v_0
  4310  		if x != v_1 {
  4311  			break
  4312  		}
  4313  		v.copyOf(x)
  4314  		return true
  4315  	}
  4316  	// match: (OR (SGTUzero x) (SGTUzero y))
  4317  	// result: (SGTUzero (OR <x.Type> x y))
  4318  	for {
  4319  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4320  			if v_0.Op != OpMIPSSGTUzero {
  4321  				continue
  4322  			}
  4323  			x := v_0.Args[0]
  4324  			if v_1.Op != OpMIPSSGTUzero {
  4325  				continue
  4326  			}
  4327  			y := v_1.Args[0]
  4328  			v.reset(OpMIPSSGTUzero)
  4329  			v0 := b.NewValue0(v.Pos, OpMIPSOR, x.Type)
  4330  			v0.AddArg2(x, y)
  4331  			v.AddArg(v0)
  4332  			return true
  4333  		}
  4334  		break
  4335  	}
  4336  	return false
  4337  }
  4338  func rewriteValueMIPS_OpMIPSORconst(v *Value) bool {
  4339  	v_0 := v.Args[0]
  4340  	// match: (ORconst [0] x)
  4341  	// result: x
  4342  	for {
  4343  		if auxIntToInt32(v.AuxInt) != 0 {
  4344  			break
  4345  		}
  4346  		x := v_0
  4347  		v.copyOf(x)
  4348  		return true
  4349  	}
  4350  	// match: (ORconst [-1] _)
  4351  	// result: (MOVWconst [-1])
  4352  	for {
  4353  		if auxIntToInt32(v.AuxInt) != -1 {
  4354  			break
  4355  		}
  4356  		v.reset(OpMIPSMOVWconst)
  4357  		v.AuxInt = int32ToAuxInt(-1)
  4358  		return true
  4359  	}
  4360  	// match: (ORconst [c] (MOVWconst [d]))
  4361  	// result: (MOVWconst [c|d])
  4362  	for {
  4363  		c := auxIntToInt32(v.AuxInt)
  4364  		if v_0.Op != OpMIPSMOVWconst {
  4365  			break
  4366  		}
  4367  		d := auxIntToInt32(v_0.AuxInt)
  4368  		v.reset(OpMIPSMOVWconst)
  4369  		v.AuxInt = int32ToAuxInt(c | d)
  4370  		return true
  4371  	}
  4372  	// match: (ORconst [c] (ORconst [d] x))
  4373  	// result: (ORconst [c|d] x)
  4374  	for {
  4375  		c := auxIntToInt32(v.AuxInt)
  4376  		if v_0.Op != OpMIPSORconst {
  4377  			break
  4378  		}
  4379  		d := auxIntToInt32(v_0.AuxInt)
  4380  		x := v_0.Args[0]
  4381  		v.reset(OpMIPSORconst)
  4382  		v.AuxInt = int32ToAuxInt(c | d)
  4383  		v.AddArg(x)
  4384  		return true
  4385  	}
  4386  	return false
  4387  }
  4388  func rewriteValueMIPS_OpMIPSSGT(v *Value) bool {
  4389  	v_1 := v.Args[1]
  4390  	v_0 := v.Args[0]
  4391  	// match: (SGT (MOVWconst [c]) x)
  4392  	// result: (SGTconst [c] x)
  4393  	for {
  4394  		if v_0.Op != OpMIPSMOVWconst {
  4395  			break
  4396  		}
  4397  		c := auxIntToInt32(v_0.AuxInt)
  4398  		x := v_1
  4399  		v.reset(OpMIPSSGTconst)
  4400  		v.AuxInt = int32ToAuxInt(c)
  4401  		v.AddArg(x)
  4402  		return true
  4403  	}
  4404  	// match: (SGT x (MOVWconst [0]))
  4405  	// result: (SGTzero x)
  4406  	for {
  4407  		x := v_0
  4408  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  4409  			break
  4410  		}
  4411  		v.reset(OpMIPSSGTzero)
  4412  		v.AddArg(x)
  4413  		return true
  4414  	}
  4415  	return false
  4416  }
  4417  func rewriteValueMIPS_OpMIPSSGTU(v *Value) bool {
  4418  	v_1 := v.Args[1]
  4419  	v_0 := v.Args[0]
  4420  	// match: (SGTU (MOVWconst [c]) x)
  4421  	// result: (SGTUconst [c] x)
  4422  	for {
  4423  		if v_0.Op != OpMIPSMOVWconst {
  4424  			break
  4425  		}
  4426  		c := auxIntToInt32(v_0.AuxInt)
  4427  		x := v_1
  4428  		v.reset(OpMIPSSGTUconst)
  4429  		v.AuxInt = int32ToAuxInt(c)
  4430  		v.AddArg(x)
  4431  		return true
  4432  	}
  4433  	// match: (SGTU x (MOVWconst [0]))
  4434  	// result: (SGTUzero x)
  4435  	for {
  4436  		x := v_0
  4437  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  4438  			break
  4439  		}
  4440  		v.reset(OpMIPSSGTUzero)
  4441  		v.AddArg(x)
  4442  		return true
  4443  	}
  4444  	return false
  4445  }
  4446  func rewriteValueMIPS_OpMIPSSGTUconst(v *Value) bool {
  4447  	v_0 := v.Args[0]
  4448  	// match: (SGTUconst [c] (MOVWconst [d]))
  4449  	// cond: uint32(c) > uint32(d)
  4450  	// result: (MOVWconst [1])
  4451  	for {
  4452  		c := auxIntToInt32(v.AuxInt)
  4453  		if v_0.Op != OpMIPSMOVWconst {
  4454  			break
  4455  		}
  4456  		d := auxIntToInt32(v_0.AuxInt)
  4457  		if !(uint32(c) > uint32(d)) {
  4458  			break
  4459  		}
  4460  		v.reset(OpMIPSMOVWconst)
  4461  		v.AuxInt = int32ToAuxInt(1)
  4462  		return true
  4463  	}
  4464  	// match: (SGTUconst [c] (MOVWconst [d]))
  4465  	// cond: uint32(c) <= uint32(d)
  4466  	// result: (MOVWconst [0])
  4467  	for {
  4468  		c := auxIntToInt32(v.AuxInt)
  4469  		if v_0.Op != OpMIPSMOVWconst {
  4470  			break
  4471  		}
  4472  		d := auxIntToInt32(v_0.AuxInt)
  4473  		if !(uint32(c) <= uint32(d)) {
  4474  			break
  4475  		}
  4476  		v.reset(OpMIPSMOVWconst)
  4477  		v.AuxInt = int32ToAuxInt(0)
  4478  		return true
  4479  	}
  4480  	// match: (SGTUconst [c] (MOVBUreg _))
  4481  	// cond: 0xff < uint32(c)
  4482  	// result: (MOVWconst [1])
  4483  	for {
  4484  		c := auxIntToInt32(v.AuxInt)
  4485  		if v_0.Op != OpMIPSMOVBUreg || !(0xff < uint32(c)) {
  4486  			break
  4487  		}
  4488  		v.reset(OpMIPSMOVWconst)
  4489  		v.AuxInt = int32ToAuxInt(1)
  4490  		return true
  4491  	}
  4492  	// match: (SGTUconst [c] (MOVHUreg _))
  4493  	// cond: 0xffff < uint32(c)
  4494  	// result: (MOVWconst [1])
  4495  	for {
  4496  		c := auxIntToInt32(v.AuxInt)
  4497  		if v_0.Op != OpMIPSMOVHUreg || !(0xffff < uint32(c)) {
  4498  			break
  4499  		}
  4500  		v.reset(OpMIPSMOVWconst)
  4501  		v.AuxInt = int32ToAuxInt(1)
  4502  		return true
  4503  	}
  4504  	// match: (SGTUconst [c] (ANDconst [m] _))
  4505  	// cond: uint32(m) < uint32(c)
  4506  	// result: (MOVWconst [1])
  4507  	for {
  4508  		c := auxIntToInt32(v.AuxInt)
  4509  		if v_0.Op != OpMIPSANDconst {
  4510  			break
  4511  		}
  4512  		m := auxIntToInt32(v_0.AuxInt)
  4513  		if !(uint32(m) < uint32(c)) {
  4514  			break
  4515  		}
  4516  		v.reset(OpMIPSMOVWconst)
  4517  		v.AuxInt = int32ToAuxInt(1)
  4518  		return true
  4519  	}
  4520  	// match: (SGTUconst [c] (SRLconst _ [d]))
  4521  	// cond: uint32(d) <= 31 && 0xffffffff>>uint32(d) < uint32(c)
  4522  	// result: (MOVWconst [1])
  4523  	for {
  4524  		c := auxIntToInt32(v.AuxInt)
  4525  		if v_0.Op != OpMIPSSRLconst {
  4526  			break
  4527  		}
  4528  		d := auxIntToInt32(v_0.AuxInt)
  4529  		if !(uint32(d) <= 31 && 0xffffffff>>uint32(d) < uint32(c)) {
  4530  			break
  4531  		}
  4532  		v.reset(OpMIPSMOVWconst)
  4533  		v.AuxInt = int32ToAuxInt(1)
  4534  		return true
  4535  	}
  4536  	return false
  4537  }
  4538  func rewriteValueMIPS_OpMIPSSGTUzero(v *Value) bool {
  4539  	v_0 := v.Args[0]
  4540  	// match: (SGTUzero (MOVWconst [d]))
  4541  	// cond: d != 0
  4542  	// result: (MOVWconst [1])
  4543  	for {
  4544  		if v_0.Op != OpMIPSMOVWconst {
  4545  			break
  4546  		}
  4547  		d := auxIntToInt32(v_0.AuxInt)
  4548  		if !(d != 0) {
  4549  			break
  4550  		}
  4551  		v.reset(OpMIPSMOVWconst)
  4552  		v.AuxInt = int32ToAuxInt(1)
  4553  		return true
  4554  	}
  4555  	// match: (SGTUzero (MOVWconst [d]))
  4556  	// cond: d == 0
  4557  	// result: (MOVWconst [0])
  4558  	for {
  4559  		if v_0.Op != OpMIPSMOVWconst {
  4560  			break
  4561  		}
  4562  		d := auxIntToInt32(v_0.AuxInt)
  4563  		if !(d == 0) {
  4564  			break
  4565  		}
  4566  		v.reset(OpMIPSMOVWconst)
  4567  		v.AuxInt = int32ToAuxInt(0)
  4568  		return true
  4569  	}
  4570  	return false
  4571  }
  4572  func rewriteValueMIPS_OpMIPSSGTconst(v *Value) bool {
  4573  	v_0 := v.Args[0]
  4574  	// match: (SGTconst [c] (MOVWconst [d]))
  4575  	// cond: c > d
  4576  	// result: (MOVWconst [1])
  4577  	for {
  4578  		c := auxIntToInt32(v.AuxInt)
  4579  		if v_0.Op != OpMIPSMOVWconst {
  4580  			break
  4581  		}
  4582  		d := auxIntToInt32(v_0.AuxInt)
  4583  		if !(c > d) {
  4584  			break
  4585  		}
  4586  		v.reset(OpMIPSMOVWconst)
  4587  		v.AuxInt = int32ToAuxInt(1)
  4588  		return true
  4589  	}
  4590  	// match: (SGTconst [c] (MOVWconst [d]))
  4591  	// cond: c <= d
  4592  	// result: (MOVWconst [0])
  4593  	for {
  4594  		c := auxIntToInt32(v.AuxInt)
  4595  		if v_0.Op != OpMIPSMOVWconst {
  4596  			break
  4597  		}
  4598  		d := auxIntToInt32(v_0.AuxInt)
  4599  		if !(c <= d) {
  4600  			break
  4601  		}
  4602  		v.reset(OpMIPSMOVWconst)
  4603  		v.AuxInt = int32ToAuxInt(0)
  4604  		return true
  4605  	}
  4606  	// match: (SGTconst [c] (MOVBreg _))
  4607  	// cond: 0x7f < c
  4608  	// result: (MOVWconst [1])
  4609  	for {
  4610  		c := auxIntToInt32(v.AuxInt)
  4611  		if v_0.Op != OpMIPSMOVBreg || !(0x7f < c) {
  4612  			break
  4613  		}
  4614  		v.reset(OpMIPSMOVWconst)
  4615  		v.AuxInt = int32ToAuxInt(1)
  4616  		return true
  4617  	}
  4618  	// match: (SGTconst [c] (MOVBreg _))
  4619  	// cond: c <= -0x80
  4620  	// result: (MOVWconst [0])
  4621  	for {
  4622  		c := auxIntToInt32(v.AuxInt)
  4623  		if v_0.Op != OpMIPSMOVBreg || !(c <= -0x80) {
  4624  			break
  4625  		}
  4626  		v.reset(OpMIPSMOVWconst)
  4627  		v.AuxInt = int32ToAuxInt(0)
  4628  		return true
  4629  	}
  4630  	// match: (SGTconst [c] (MOVBUreg _))
  4631  	// cond: 0xff < c
  4632  	// result: (MOVWconst [1])
  4633  	for {
  4634  		c := auxIntToInt32(v.AuxInt)
  4635  		if v_0.Op != OpMIPSMOVBUreg || !(0xff < c) {
  4636  			break
  4637  		}
  4638  		v.reset(OpMIPSMOVWconst)
  4639  		v.AuxInt = int32ToAuxInt(1)
  4640  		return true
  4641  	}
  4642  	// match: (SGTconst [c] (MOVBUreg _))
  4643  	// cond: c < 0
  4644  	// result: (MOVWconst [0])
  4645  	for {
  4646  		c := auxIntToInt32(v.AuxInt)
  4647  		if v_0.Op != OpMIPSMOVBUreg || !(c < 0) {
  4648  			break
  4649  		}
  4650  		v.reset(OpMIPSMOVWconst)
  4651  		v.AuxInt = int32ToAuxInt(0)
  4652  		return true
  4653  	}
  4654  	// match: (SGTconst [c] (MOVHreg _))
  4655  	// cond: 0x7fff < c
  4656  	// result: (MOVWconst [1])
  4657  	for {
  4658  		c := auxIntToInt32(v.AuxInt)
  4659  		if v_0.Op != OpMIPSMOVHreg || !(0x7fff < c) {
  4660  			break
  4661  		}
  4662  		v.reset(OpMIPSMOVWconst)
  4663  		v.AuxInt = int32ToAuxInt(1)
  4664  		return true
  4665  	}
  4666  	// match: (SGTconst [c] (MOVHreg _))
  4667  	// cond: c <= -0x8000
  4668  	// result: (MOVWconst [0])
  4669  	for {
  4670  		c := auxIntToInt32(v.AuxInt)
  4671  		if v_0.Op != OpMIPSMOVHreg || !(c <= -0x8000) {
  4672  			break
  4673  		}
  4674  		v.reset(OpMIPSMOVWconst)
  4675  		v.AuxInt = int32ToAuxInt(0)
  4676  		return true
  4677  	}
  4678  	// match: (SGTconst [c] (MOVHUreg _))
  4679  	// cond: 0xffff < c
  4680  	// result: (MOVWconst [1])
  4681  	for {
  4682  		c := auxIntToInt32(v.AuxInt)
  4683  		if v_0.Op != OpMIPSMOVHUreg || !(0xffff < c) {
  4684  			break
  4685  		}
  4686  		v.reset(OpMIPSMOVWconst)
  4687  		v.AuxInt = int32ToAuxInt(1)
  4688  		return true
  4689  	}
  4690  	// match: (SGTconst [c] (MOVHUreg _))
  4691  	// cond: c < 0
  4692  	// result: (MOVWconst [0])
  4693  	for {
  4694  		c := auxIntToInt32(v.AuxInt)
  4695  		if v_0.Op != OpMIPSMOVHUreg || !(c < 0) {
  4696  			break
  4697  		}
  4698  		v.reset(OpMIPSMOVWconst)
  4699  		v.AuxInt = int32ToAuxInt(0)
  4700  		return true
  4701  	}
  4702  	// match: (SGTconst [c] (ANDconst [m] _))
  4703  	// cond: 0 <= m && m < c
  4704  	// result: (MOVWconst [1])
  4705  	for {
  4706  		c := auxIntToInt32(v.AuxInt)
  4707  		if v_0.Op != OpMIPSANDconst {
  4708  			break
  4709  		}
  4710  		m := auxIntToInt32(v_0.AuxInt)
  4711  		if !(0 <= m && m < c) {
  4712  			break
  4713  		}
  4714  		v.reset(OpMIPSMOVWconst)
  4715  		v.AuxInt = int32ToAuxInt(1)
  4716  		return true
  4717  	}
  4718  	// match: (SGTconst [c] (SRLconst _ [d]))
  4719  	// cond: 0 <= c && uint32(d) <= 31 && 0xffffffff>>uint32(d) < uint32(c)
  4720  	// result: (MOVWconst [1])
  4721  	for {
  4722  		c := auxIntToInt32(v.AuxInt)
  4723  		if v_0.Op != OpMIPSSRLconst {
  4724  			break
  4725  		}
  4726  		d := auxIntToInt32(v_0.AuxInt)
  4727  		if !(0 <= c && uint32(d) <= 31 && 0xffffffff>>uint32(d) < uint32(c)) {
  4728  			break
  4729  		}
  4730  		v.reset(OpMIPSMOVWconst)
  4731  		v.AuxInt = int32ToAuxInt(1)
  4732  		return true
  4733  	}
  4734  	return false
  4735  }
  4736  func rewriteValueMIPS_OpMIPSSGTzero(v *Value) bool {
  4737  	v_0 := v.Args[0]
  4738  	// match: (SGTzero (MOVWconst [d]))
  4739  	// cond: d > 0
  4740  	// result: (MOVWconst [1])
  4741  	for {
  4742  		if v_0.Op != OpMIPSMOVWconst {
  4743  			break
  4744  		}
  4745  		d := auxIntToInt32(v_0.AuxInt)
  4746  		if !(d > 0) {
  4747  			break
  4748  		}
  4749  		v.reset(OpMIPSMOVWconst)
  4750  		v.AuxInt = int32ToAuxInt(1)
  4751  		return true
  4752  	}
  4753  	// match: (SGTzero (MOVWconst [d]))
  4754  	// cond: d <= 0
  4755  	// result: (MOVWconst [0])
  4756  	for {
  4757  		if v_0.Op != OpMIPSMOVWconst {
  4758  			break
  4759  		}
  4760  		d := auxIntToInt32(v_0.AuxInt)
  4761  		if !(d <= 0) {
  4762  			break
  4763  		}
  4764  		v.reset(OpMIPSMOVWconst)
  4765  		v.AuxInt = int32ToAuxInt(0)
  4766  		return true
  4767  	}
  4768  	return false
  4769  }
  4770  func rewriteValueMIPS_OpMIPSSLL(v *Value) bool {
  4771  	v_1 := v.Args[1]
  4772  	v_0 := v.Args[0]
  4773  	// match: (SLL x (MOVWconst [c]))
  4774  	// result: (SLLconst x [c&31])
  4775  	for {
  4776  		x := v_0
  4777  		if v_1.Op != OpMIPSMOVWconst {
  4778  			break
  4779  		}
  4780  		c := auxIntToInt32(v_1.AuxInt)
  4781  		v.reset(OpMIPSSLLconst)
  4782  		v.AuxInt = int32ToAuxInt(c & 31)
  4783  		v.AddArg(x)
  4784  		return true
  4785  	}
  4786  	return false
  4787  }
  4788  func rewriteValueMIPS_OpMIPSSLLconst(v *Value) bool {
  4789  	v_0 := v.Args[0]
  4790  	// match: (SLLconst [c] (MOVWconst [d]))
  4791  	// result: (MOVWconst [d<<uint32(c)])
  4792  	for {
  4793  		c := auxIntToInt32(v.AuxInt)
  4794  		if v_0.Op != OpMIPSMOVWconst {
  4795  			break
  4796  		}
  4797  		d := auxIntToInt32(v_0.AuxInt)
  4798  		v.reset(OpMIPSMOVWconst)
  4799  		v.AuxInt = int32ToAuxInt(d << uint32(c))
  4800  		return true
  4801  	}
  4802  	return false
  4803  }
  4804  func rewriteValueMIPS_OpMIPSSRA(v *Value) bool {
  4805  	v_1 := v.Args[1]
  4806  	v_0 := v.Args[0]
  4807  	// match: (SRA x (MOVWconst [c]))
  4808  	// result: (SRAconst x [c&31])
  4809  	for {
  4810  		x := v_0
  4811  		if v_1.Op != OpMIPSMOVWconst {
  4812  			break
  4813  		}
  4814  		c := auxIntToInt32(v_1.AuxInt)
  4815  		v.reset(OpMIPSSRAconst)
  4816  		v.AuxInt = int32ToAuxInt(c & 31)
  4817  		v.AddArg(x)
  4818  		return true
  4819  	}
  4820  	return false
  4821  }
  4822  func rewriteValueMIPS_OpMIPSSRAconst(v *Value) bool {
  4823  	v_0 := v.Args[0]
  4824  	// match: (SRAconst [c] (MOVWconst [d]))
  4825  	// result: (MOVWconst [d>>uint32(c)])
  4826  	for {
  4827  		c := auxIntToInt32(v.AuxInt)
  4828  		if v_0.Op != OpMIPSMOVWconst {
  4829  			break
  4830  		}
  4831  		d := auxIntToInt32(v_0.AuxInt)
  4832  		v.reset(OpMIPSMOVWconst)
  4833  		v.AuxInt = int32ToAuxInt(d >> uint32(c))
  4834  		return true
  4835  	}
  4836  	return false
  4837  }
  4838  func rewriteValueMIPS_OpMIPSSRL(v *Value) bool {
  4839  	v_1 := v.Args[1]
  4840  	v_0 := v.Args[0]
  4841  	// match: (SRL x (MOVWconst [c]))
  4842  	// result: (SRLconst x [c&31])
  4843  	for {
  4844  		x := v_0
  4845  		if v_1.Op != OpMIPSMOVWconst {
  4846  			break
  4847  		}
  4848  		c := auxIntToInt32(v_1.AuxInt)
  4849  		v.reset(OpMIPSSRLconst)
  4850  		v.AuxInt = int32ToAuxInt(c & 31)
  4851  		v.AddArg(x)
  4852  		return true
  4853  	}
  4854  	return false
  4855  }
  4856  func rewriteValueMIPS_OpMIPSSRLconst(v *Value) bool {
  4857  	v_0 := v.Args[0]
  4858  	// match: (SRLconst [c] (MOVWconst [d]))
  4859  	// result: (MOVWconst [int32(uint32(d)>>uint32(c))])
  4860  	for {
  4861  		c := auxIntToInt32(v.AuxInt)
  4862  		if v_0.Op != OpMIPSMOVWconst {
  4863  			break
  4864  		}
  4865  		d := auxIntToInt32(v_0.AuxInt)
  4866  		v.reset(OpMIPSMOVWconst)
  4867  		v.AuxInt = int32ToAuxInt(int32(uint32(d) >> uint32(c)))
  4868  		return true
  4869  	}
  4870  	return false
  4871  }
  4872  func rewriteValueMIPS_OpMIPSSUB(v *Value) bool {
  4873  	v_1 := v.Args[1]
  4874  	v_0 := v.Args[0]
  4875  	// match: (SUB x (MOVWconst [c]))
  4876  	// result: (SUBconst [c] x)
  4877  	for {
  4878  		x := v_0
  4879  		if v_1.Op != OpMIPSMOVWconst {
  4880  			break
  4881  		}
  4882  		c := auxIntToInt32(v_1.AuxInt)
  4883  		v.reset(OpMIPSSUBconst)
  4884  		v.AuxInt = int32ToAuxInt(c)
  4885  		v.AddArg(x)
  4886  		return true
  4887  	}
  4888  	// match: (SUB x (NEG y))
  4889  	// result: (ADD x y)
  4890  	for {
  4891  		x := v_0
  4892  		if v_1.Op != OpMIPSNEG {
  4893  			break
  4894  		}
  4895  		y := v_1.Args[0]
  4896  		v.reset(OpMIPSADD)
  4897  		v.AddArg2(x, y)
  4898  		return true
  4899  	}
  4900  	// match: (SUB x x)
  4901  	// result: (MOVWconst [0])
  4902  	for {
  4903  		x := v_0
  4904  		if x != v_1 {
  4905  			break
  4906  		}
  4907  		v.reset(OpMIPSMOVWconst)
  4908  		v.AuxInt = int32ToAuxInt(0)
  4909  		return true
  4910  	}
  4911  	// match: (SUB (MOVWconst [0]) x)
  4912  	// result: (NEG x)
  4913  	for {
  4914  		if v_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  4915  			break
  4916  		}
  4917  		x := v_1
  4918  		v.reset(OpMIPSNEG)
  4919  		v.AddArg(x)
  4920  		return true
  4921  	}
  4922  	return false
  4923  }
  4924  func rewriteValueMIPS_OpMIPSSUBconst(v *Value) bool {
  4925  	v_0 := v.Args[0]
  4926  	// match: (SUBconst [0] x)
  4927  	// result: x
  4928  	for {
  4929  		if auxIntToInt32(v.AuxInt) != 0 {
  4930  			break
  4931  		}
  4932  		x := v_0
  4933  		v.copyOf(x)
  4934  		return true
  4935  	}
  4936  	// match: (SUBconst [c] (MOVWconst [d]))
  4937  	// result: (MOVWconst [d-c])
  4938  	for {
  4939  		c := auxIntToInt32(v.AuxInt)
  4940  		if v_0.Op != OpMIPSMOVWconst {
  4941  			break
  4942  		}
  4943  		d := auxIntToInt32(v_0.AuxInt)
  4944  		v.reset(OpMIPSMOVWconst)
  4945  		v.AuxInt = int32ToAuxInt(d - c)
  4946  		return true
  4947  	}
  4948  	// match: (SUBconst [c] (SUBconst [d] x))
  4949  	// result: (ADDconst [-c-d] x)
  4950  	for {
  4951  		c := auxIntToInt32(v.AuxInt)
  4952  		if v_0.Op != OpMIPSSUBconst {
  4953  			break
  4954  		}
  4955  		d := auxIntToInt32(v_0.AuxInt)
  4956  		x := v_0.Args[0]
  4957  		v.reset(OpMIPSADDconst)
  4958  		v.AuxInt = int32ToAuxInt(-c - d)
  4959  		v.AddArg(x)
  4960  		return true
  4961  	}
  4962  	// match: (SUBconst [c] (ADDconst [d] x))
  4963  	// result: (ADDconst [-c+d] x)
  4964  	for {
  4965  		c := auxIntToInt32(v.AuxInt)
  4966  		if v_0.Op != OpMIPSADDconst {
  4967  			break
  4968  		}
  4969  		d := auxIntToInt32(v_0.AuxInt)
  4970  		x := v_0.Args[0]
  4971  		v.reset(OpMIPSADDconst)
  4972  		v.AuxInt = int32ToAuxInt(-c + d)
  4973  		v.AddArg(x)
  4974  		return true
  4975  	}
  4976  	return false
  4977  }
  4978  func rewriteValueMIPS_OpMIPSXOR(v *Value) bool {
  4979  	v_1 := v.Args[1]
  4980  	v_0 := v.Args[0]
  4981  	// match: (XOR x (MOVWconst [c]))
  4982  	// result: (XORconst [c] x)
  4983  	for {
  4984  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4985  			x := v_0
  4986  			if v_1.Op != OpMIPSMOVWconst {
  4987  				continue
  4988  			}
  4989  			c := auxIntToInt32(v_1.AuxInt)
  4990  			v.reset(OpMIPSXORconst)
  4991  			v.AuxInt = int32ToAuxInt(c)
  4992  			v.AddArg(x)
  4993  			return true
  4994  		}
  4995  		break
  4996  	}
  4997  	// match: (XOR x x)
  4998  	// result: (MOVWconst [0])
  4999  	for {
  5000  		x := v_0
  5001  		if x != v_1 {
  5002  			break
  5003  		}
  5004  		v.reset(OpMIPSMOVWconst)
  5005  		v.AuxInt = int32ToAuxInt(0)
  5006  		return true
  5007  	}
  5008  	return false
  5009  }
  5010  func rewriteValueMIPS_OpMIPSXORconst(v *Value) bool {
  5011  	v_0 := v.Args[0]
  5012  	// match: (XORconst [0] x)
  5013  	// result: x
  5014  	for {
  5015  		if auxIntToInt32(v.AuxInt) != 0 {
  5016  			break
  5017  		}
  5018  		x := v_0
  5019  		v.copyOf(x)
  5020  		return true
  5021  	}
  5022  	// match: (XORconst [c] (MOVWconst [d]))
  5023  	// result: (MOVWconst [c^d])
  5024  	for {
  5025  		c := auxIntToInt32(v.AuxInt)
  5026  		if v_0.Op != OpMIPSMOVWconst {
  5027  			break
  5028  		}
  5029  		d := auxIntToInt32(v_0.AuxInt)
  5030  		v.reset(OpMIPSMOVWconst)
  5031  		v.AuxInt = int32ToAuxInt(c ^ d)
  5032  		return true
  5033  	}
  5034  	// match: (XORconst [c] (XORconst [d] x))
  5035  	// result: (XORconst [c^d] x)
  5036  	for {
  5037  		c := auxIntToInt32(v.AuxInt)
  5038  		if v_0.Op != OpMIPSXORconst {
  5039  			break
  5040  		}
  5041  		d := auxIntToInt32(v_0.AuxInt)
  5042  		x := v_0.Args[0]
  5043  		v.reset(OpMIPSXORconst)
  5044  		v.AuxInt = int32ToAuxInt(c ^ d)
  5045  		v.AddArg(x)
  5046  		return true
  5047  	}
  5048  	return false
  5049  }
  5050  func rewriteValueMIPS_OpMod16(v *Value) bool {
  5051  	v_1 := v.Args[1]
  5052  	v_0 := v.Args[0]
  5053  	b := v.Block
  5054  	typ := &b.Func.Config.Types
  5055  	// match: (Mod16 x y)
  5056  	// result: (Select0 (DIV (SignExt16to32 x) (SignExt16to32 y)))
  5057  	for {
  5058  		x := v_0
  5059  		y := v_1
  5060  		v.reset(OpSelect0)
  5061  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  5062  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  5063  		v1.AddArg(x)
  5064  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  5065  		v2.AddArg(y)
  5066  		v0.AddArg2(v1, v2)
  5067  		v.AddArg(v0)
  5068  		return true
  5069  	}
  5070  }
  5071  func rewriteValueMIPS_OpMod16u(v *Value) bool {
  5072  	v_1 := v.Args[1]
  5073  	v_0 := v.Args[0]
  5074  	b := v.Block
  5075  	typ := &b.Func.Config.Types
  5076  	// match: (Mod16u x y)
  5077  	// result: (Select0 (DIVU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  5078  	for {
  5079  		x := v_0
  5080  		y := v_1
  5081  		v.reset(OpSelect0)
  5082  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  5083  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5084  		v1.AddArg(x)
  5085  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5086  		v2.AddArg(y)
  5087  		v0.AddArg2(v1, v2)
  5088  		v.AddArg(v0)
  5089  		return true
  5090  	}
  5091  }
  5092  func rewriteValueMIPS_OpMod32(v *Value) bool {
  5093  	v_1 := v.Args[1]
  5094  	v_0 := v.Args[0]
  5095  	b := v.Block
  5096  	typ := &b.Func.Config.Types
  5097  	// match: (Mod32 x y)
  5098  	// result: (Select0 (DIV x y))
  5099  	for {
  5100  		x := v_0
  5101  		y := v_1
  5102  		v.reset(OpSelect0)
  5103  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  5104  		v0.AddArg2(x, y)
  5105  		v.AddArg(v0)
  5106  		return true
  5107  	}
  5108  }
  5109  func rewriteValueMIPS_OpMod32u(v *Value) bool {
  5110  	v_1 := v.Args[1]
  5111  	v_0 := v.Args[0]
  5112  	b := v.Block
  5113  	typ := &b.Func.Config.Types
  5114  	// match: (Mod32u x y)
  5115  	// result: (Select0 (DIVU x y))
  5116  	for {
  5117  		x := v_0
  5118  		y := v_1
  5119  		v.reset(OpSelect0)
  5120  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  5121  		v0.AddArg2(x, y)
  5122  		v.AddArg(v0)
  5123  		return true
  5124  	}
  5125  }
  5126  func rewriteValueMIPS_OpMod8(v *Value) bool {
  5127  	v_1 := v.Args[1]
  5128  	v_0 := v.Args[0]
  5129  	b := v.Block
  5130  	typ := &b.Func.Config.Types
  5131  	// match: (Mod8 x y)
  5132  	// result: (Select0 (DIV (SignExt8to32 x) (SignExt8to32 y)))
  5133  	for {
  5134  		x := v_0
  5135  		y := v_1
  5136  		v.reset(OpSelect0)
  5137  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  5138  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  5139  		v1.AddArg(x)
  5140  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  5141  		v2.AddArg(y)
  5142  		v0.AddArg2(v1, v2)
  5143  		v.AddArg(v0)
  5144  		return true
  5145  	}
  5146  }
  5147  func rewriteValueMIPS_OpMod8u(v *Value) bool {
  5148  	v_1 := v.Args[1]
  5149  	v_0 := v.Args[0]
  5150  	b := v.Block
  5151  	typ := &b.Func.Config.Types
  5152  	// match: (Mod8u x y)
  5153  	// result: (Select0 (DIVU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  5154  	for {
  5155  		x := v_0
  5156  		y := v_1
  5157  		v.reset(OpSelect0)
  5158  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  5159  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5160  		v1.AddArg(x)
  5161  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5162  		v2.AddArg(y)
  5163  		v0.AddArg2(v1, v2)
  5164  		v.AddArg(v0)
  5165  		return true
  5166  	}
  5167  }
  5168  func rewriteValueMIPS_OpMove(v *Value) bool {
  5169  	v_2 := v.Args[2]
  5170  	v_1 := v.Args[1]
  5171  	v_0 := v.Args[0]
  5172  	b := v.Block
  5173  	config := b.Func.Config
  5174  	typ := &b.Func.Config.Types
  5175  	// match: (Move [0] _ _ mem)
  5176  	// result: mem
  5177  	for {
  5178  		if auxIntToInt64(v.AuxInt) != 0 {
  5179  			break
  5180  		}
  5181  		mem := v_2
  5182  		v.copyOf(mem)
  5183  		return true
  5184  	}
  5185  	// match: (Move [1] dst src mem)
  5186  	// result: (MOVBstore dst (MOVBUload src mem) mem)
  5187  	for {
  5188  		if auxIntToInt64(v.AuxInt) != 1 {
  5189  			break
  5190  		}
  5191  		dst := v_0
  5192  		src := v_1
  5193  		mem := v_2
  5194  		v.reset(OpMIPSMOVBstore)
  5195  		v0 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5196  		v0.AddArg2(src, mem)
  5197  		v.AddArg3(dst, v0, mem)
  5198  		return true
  5199  	}
  5200  	// match: (Move [2] {t} dst src mem)
  5201  	// cond: t.Alignment()%2 == 0
  5202  	// result: (MOVHstore dst (MOVHUload src mem) mem)
  5203  	for {
  5204  		if auxIntToInt64(v.AuxInt) != 2 {
  5205  			break
  5206  		}
  5207  		t := auxToType(v.Aux)
  5208  		dst := v_0
  5209  		src := v_1
  5210  		mem := v_2
  5211  		if !(t.Alignment()%2 == 0) {
  5212  			break
  5213  		}
  5214  		v.reset(OpMIPSMOVHstore)
  5215  		v0 := b.NewValue0(v.Pos, OpMIPSMOVHUload, typ.UInt16)
  5216  		v0.AddArg2(src, mem)
  5217  		v.AddArg3(dst, v0, mem)
  5218  		return true
  5219  	}
  5220  	// match: (Move [2] dst src mem)
  5221  	// result: (MOVBstore [1] dst (MOVBUload [1] src mem) (MOVBstore dst (MOVBUload src mem) mem))
  5222  	for {
  5223  		if auxIntToInt64(v.AuxInt) != 2 {
  5224  			break
  5225  		}
  5226  		dst := v_0
  5227  		src := v_1
  5228  		mem := v_2
  5229  		v.reset(OpMIPSMOVBstore)
  5230  		v.AuxInt = int32ToAuxInt(1)
  5231  		v0 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5232  		v0.AuxInt = int32ToAuxInt(1)
  5233  		v0.AddArg2(src, mem)
  5234  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  5235  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5236  		v2.AddArg2(src, mem)
  5237  		v1.AddArg3(dst, v2, mem)
  5238  		v.AddArg3(dst, v0, v1)
  5239  		return true
  5240  	}
  5241  	// match: (Move [4] {t} dst src mem)
  5242  	// cond: t.Alignment()%4 == 0
  5243  	// result: (MOVWstore dst (MOVWload src mem) mem)
  5244  	for {
  5245  		if auxIntToInt64(v.AuxInt) != 4 {
  5246  			break
  5247  		}
  5248  		t := auxToType(v.Aux)
  5249  		dst := v_0
  5250  		src := v_1
  5251  		mem := v_2
  5252  		if !(t.Alignment()%4 == 0) {
  5253  			break
  5254  		}
  5255  		v.reset(OpMIPSMOVWstore)
  5256  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5257  		v0.AddArg2(src, mem)
  5258  		v.AddArg3(dst, v0, mem)
  5259  		return true
  5260  	}
  5261  	// match: (Move [4] {t} dst src mem)
  5262  	// cond: t.Alignment()%2 == 0
  5263  	// result: (MOVHstore [2] dst (MOVHUload [2] src mem) (MOVHstore dst (MOVHUload src mem) mem))
  5264  	for {
  5265  		if auxIntToInt64(v.AuxInt) != 4 {
  5266  			break
  5267  		}
  5268  		t := auxToType(v.Aux)
  5269  		dst := v_0
  5270  		src := v_1
  5271  		mem := v_2
  5272  		if !(t.Alignment()%2 == 0) {
  5273  			break
  5274  		}
  5275  		v.reset(OpMIPSMOVHstore)
  5276  		v.AuxInt = int32ToAuxInt(2)
  5277  		v0 := b.NewValue0(v.Pos, OpMIPSMOVHUload, typ.UInt16)
  5278  		v0.AuxInt = int32ToAuxInt(2)
  5279  		v0.AddArg2(src, mem)
  5280  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5281  		v2 := b.NewValue0(v.Pos, OpMIPSMOVHUload, typ.UInt16)
  5282  		v2.AddArg2(src, mem)
  5283  		v1.AddArg3(dst, v2, mem)
  5284  		v.AddArg3(dst, v0, v1)
  5285  		return true
  5286  	}
  5287  	// match: (Move [4] dst src mem)
  5288  	// result: (MOVBstore [3] dst (MOVBUload [3] src mem) (MOVBstore [2] dst (MOVBUload [2] src mem) (MOVBstore [1] dst (MOVBUload [1] src mem) (MOVBstore dst (MOVBUload src mem) mem))))
  5289  	for {
  5290  		if auxIntToInt64(v.AuxInt) != 4 {
  5291  			break
  5292  		}
  5293  		dst := v_0
  5294  		src := v_1
  5295  		mem := v_2
  5296  		v.reset(OpMIPSMOVBstore)
  5297  		v.AuxInt = int32ToAuxInt(3)
  5298  		v0 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5299  		v0.AuxInt = int32ToAuxInt(3)
  5300  		v0.AddArg2(src, mem)
  5301  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  5302  		v1.AuxInt = int32ToAuxInt(2)
  5303  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5304  		v2.AuxInt = int32ToAuxInt(2)
  5305  		v2.AddArg2(src, mem)
  5306  		v3 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  5307  		v3.AuxInt = int32ToAuxInt(1)
  5308  		v4 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5309  		v4.AuxInt = int32ToAuxInt(1)
  5310  		v4.AddArg2(src, mem)
  5311  		v5 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  5312  		v6 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5313  		v6.AddArg2(src, mem)
  5314  		v5.AddArg3(dst, v6, mem)
  5315  		v3.AddArg3(dst, v4, v5)
  5316  		v1.AddArg3(dst, v2, v3)
  5317  		v.AddArg3(dst, v0, v1)
  5318  		return true
  5319  	}
  5320  	// match: (Move [3] dst src mem)
  5321  	// result: (MOVBstore [2] dst (MOVBUload [2] src mem) (MOVBstore [1] dst (MOVBUload [1] src mem) (MOVBstore dst (MOVBUload src mem) mem)))
  5322  	for {
  5323  		if auxIntToInt64(v.AuxInt) != 3 {
  5324  			break
  5325  		}
  5326  		dst := v_0
  5327  		src := v_1
  5328  		mem := v_2
  5329  		v.reset(OpMIPSMOVBstore)
  5330  		v.AuxInt = int32ToAuxInt(2)
  5331  		v0 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5332  		v0.AuxInt = int32ToAuxInt(2)
  5333  		v0.AddArg2(src, mem)
  5334  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  5335  		v1.AuxInt = int32ToAuxInt(1)
  5336  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5337  		v2.AuxInt = int32ToAuxInt(1)
  5338  		v2.AddArg2(src, mem)
  5339  		v3 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  5340  		v4 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5341  		v4.AddArg2(src, mem)
  5342  		v3.AddArg3(dst, v4, mem)
  5343  		v1.AddArg3(dst, v2, v3)
  5344  		v.AddArg3(dst, v0, v1)
  5345  		return true
  5346  	}
  5347  	// match: (Move [8] {t} dst src mem)
  5348  	// cond: t.Alignment()%4 == 0
  5349  	// result: (MOVWstore [4] dst (MOVWload [4] src mem) (MOVWstore dst (MOVWload src mem) mem))
  5350  	for {
  5351  		if auxIntToInt64(v.AuxInt) != 8 {
  5352  			break
  5353  		}
  5354  		t := auxToType(v.Aux)
  5355  		dst := v_0
  5356  		src := v_1
  5357  		mem := v_2
  5358  		if !(t.Alignment()%4 == 0) {
  5359  			break
  5360  		}
  5361  		v.reset(OpMIPSMOVWstore)
  5362  		v.AuxInt = int32ToAuxInt(4)
  5363  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5364  		v0.AuxInt = int32ToAuxInt(4)
  5365  		v0.AddArg2(src, mem)
  5366  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5367  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5368  		v2.AddArg2(src, mem)
  5369  		v1.AddArg3(dst, v2, mem)
  5370  		v.AddArg3(dst, v0, v1)
  5371  		return true
  5372  	}
  5373  	// match: (Move [8] {t} dst src mem)
  5374  	// cond: t.Alignment()%2 == 0
  5375  	// result: (MOVHstore [6] dst (MOVHload [6] src mem) (MOVHstore [4] dst (MOVHload [4] src mem) (MOVHstore [2] dst (MOVHload [2] src mem) (MOVHstore dst (MOVHload src mem) mem))))
  5376  	for {
  5377  		if auxIntToInt64(v.AuxInt) != 8 {
  5378  			break
  5379  		}
  5380  		t := auxToType(v.Aux)
  5381  		dst := v_0
  5382  		src := v_1
  5383  		mem := v_2
  5384  		if !(t.Alignment()%2 == 0) {
  5385  			break
  5386  		}
  5387  		v.reset(OpMIPSMOVHstore)
  5388  		v.AuxInt = int32ToAuxInt(6)
  5389  		v0 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5390  		v0.AuxInt = int32ToAuxInt(6)
  5391  		v0.AddArg2(src, mem)
  5392  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5393  		v1.AuxInt = int32ToAuxInt(4)
  5394  		v2 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5395  		v2.AuxInt = int32ToAuxInt(4)
  5396  		v2.AddArg2(src, mem)
  5397  		v3 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5398  		v3.AuxInt = int32ToAuxInt(2)
  5399  		v4 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5400  		v4.AuxInt = int32ToAuxInt(2)
  5401  		v4.AddArg2(src, mem)
  5402  		v5 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5403  		v6 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5404  		v6.AddArg2(src, mem)
  5405  		v5.AddArg3(dst, v6, mem)
  5406  		v3.AddArg3(dst, v4, v5)
  5407  		v1.AddArg3(dst, v2, v3)
  5408  		v.AddArg3(dst, v0, v1)
  5409  		return true
  5410  	}
  5411  	// match: (Move [6] {t} dst src mem)
  5412  	// cond: t.Alignment()%2 == 0
  5413  	// result: (MOVHstore [4] dst (MOVHload [4] src mem) (MOVHstore [2] dst (MOVHload [2] src mem) (MOVHstore dst (MOVHload src mem) mem)))
  5414  	for {
  5415  		if auxIntToInt64(v.AuxInt) != 6 {
  5416  			break
  5417  		}
  5418  		t := auxToType(v.Aux)
  5419  		dst := v_0
  5420  		src := v_1
  5421  		mem := v_2
  5422  		if !(t.Alignment()%2 == 0) {
  5423  			break
  5424  		}
  5425  		v.reset(OpMIPSMOVHstore)
  5426  		v.AuxInt = int32ToAuxInt(4)
  5427  		v0 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5428  		v0.AuxInt = int32ToAuxInt(4)
  5429  		v0.AddArg2(src, mem)
  5430  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5431  		v1.AuxInt = int32ToAuxInt(2)
  5432  		v2 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5433  		v2.AuxInt = int32ToAuxInt(2)
  5434  		v2.AddArg2(src, mem)
  5435  		v3 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5436  		v4 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5437  		v4.AddArg2(src, mem)
  5438  		v3.AddArg3(dst, v4, mem)
  5439  		v1.AddArg3(dst, v2, v3)
  5440  		v.AddArg3(dst, v0, v1)
  5441  		return true
  5442  	}
  5443  	// match: (Move [12] {t} dst src mem)
  5444  	// cond: t.Alignment()%4 == 0
  5445  	// result: (MOVWstore [8] dst (MOVWload [8] src mem) (MOVWstore [4] dst (MOVWload [4] src mem) (MOVWstore dst (MOVWload src mem) mem)))
  5446  	for {
  5447  		if auxIntToInt64(v.AuxInt) != 12 {
  5448  			break
  5449  		}
  5450  		t := auxToType(v.Aux)
  5451  		dst := v_0
  5452  		src := v_1
  5453  		mem := v_2
  5454  		if !(t.Alignment()%4 == 0) {
  5455  			break
  5456  		}
  5457  		v.reset(OpMIPSMOVWstore)
  5458  		v.AuxInt = int32ToAuxInt(8)
  5459  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5460  		v0.AuxInt = int32ToAuxInt(8)
  5461  		v0.AddArg2(src, mem)
  5462  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5463  		v1.AuxInt = int32ToAuxInt(4)
  5464  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5465  		v2.AuxInt = int32ToAuxInt(4)
  5466  		v2.AddArg2(src, mem)
  5467  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5468  		v4 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5469  		v4.AddArg2(src, mem)
  5470  		v3.AddArg3(dst, v4, mem)
  5471  		v1.AddArg3(dst, v2, v3)
  5472  		v.AddArg3(dst, v0, v1)
  5473  		return true
  5474  	}
  5475  	// match: (Move [16] {t} dst src mem)
  5476  	// cond: t.Alignment()%4 == 0
  5477  	// result: (MOVWstore [12] dst (MOVWload [12] src mem) (MOVWstore [8] dst (MOVWload [8] src mem) (MOVWstore [4] dst (MOVWload [4] src mem) (MOVWstore dst (MOVWload src mem) mem))))
  5478  	for {
  5479  		if auxIntToInt64(v.AuxInt) != 16 {
  5480  			break
  5481  		}
  5482  		t := auxToType(v.Aux)
  5483  		dst := v_0
  5484  		src := v_1
  5485  		mem := v_2
  5486  		if !(t.Alignment()%4 == 0) {
  5487  			break
  5488  		}
  5489  		v.reset(OpMIPSMOVWstore)
  5490  		v.AuxInt = int32ToAuxInt(12)
  5491  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5492  		v0.AuxInt = int32ToAuxInt(12)
  5493  		v0.AddArg2(src, mem)
  5494  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5495  		v1.AuxInt = int32ToAuxInt(8)
  5496  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5497  		v2.AuxInt = int32ToAuxInt(8)
  5498  		v2.AddArg2(src, mem)
  5499  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5500  		v3.AuxInt = int32ToAuxInt(4)
  5501  		v4 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5502  		v4.AuxInt = int32ToAuxInt(4)
  5503  		v4.AddArg2(src, mem)
  5504  		v5 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5505  		v6 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5506  		v6.AddArg2(src, mem)
  5507  		v5.AddArg3(dst, v6, mem)
  5508  		v3.AddArg3(dst, v4, v5)
  5509  		v1.AddArg3(dst, v2, v3)
  5510  		v.AddArg3(dst, v0, v1)
  5511  		return true
  5512  	}
  5513  	// match: (Move [s] {t} dst src mem)
  5514  	// cond: (s > 16 && logLargeCopy(v, s) || t.Alignment()%4 != 0)
  5515  	// result: (LoweredMove [int32(t.Alignment())] dst src (ADDconst <src.Type> src [int32(s-moveSize(t.Alignment(), config))]) mem)
  5516  	for {
  5517  		s := auxIntToInt64(v.AuxInt)
  5518  		t := auxToType(v.Aux)
  5519  		dst := v_0
  5520  		src := v_1
  5521  		mem := v_2
  5522  		if !(s > 16 && logLargeCopy(v, s) || t.Alignment()%4 != 0) {
  5523  			break
  5524  		}
  5525  		v.reset(OpMIPSLoweredMove)
  5526  		v.AuxInt = int32ToAuxInt(int32(t.Alignment()))
  5527  		v0 := b.NewValue0(v.Pos, OpMIPSADDconst, src.Type)
  5528  		v0.AuxInt = int32ToAuxInt(int32(s - moveSize(t.Alignment(), config)))
  5529  		v0.AddArg(src)
  5530  		v.AddArg4(dst, src, v0, mem)
  5531  		return true
  5532  	}
  5533  	return false
  5534  }
  5535  func rewriteValueMIPS_OpNeq16(v *Value) bool {
  5536  	v_1 := v.Args[1]
  5537  	v_0 := v.Args[0]
  5538  	b := v.Block
  5539  	typ := &b.Func.Config.Types
  5540  	// match: (Neq16 x y)
  5541  	// result: (SGTU (XOR (ZeroExt16to32 x) (ZeroExt16to32 y)) (MOVWconst [0]))
  5542  	for {
  5543  		x := v_0
  5544  		y := v_1
  5545  		v.reset(OpMIPSSGTU)
  5546  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  5547  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5548  		v1.AddArg(x)
  5549  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5550  		v2.AddArg(y)
  5551  		v0.AddArg2(v1, v2)
  5552  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5553  		v3.AuxInt = int32ToAuxInt(0)
  5554  		v.AddArg2(v0, v3)
  5555  		return true
  5556  	}
  5557  }
  5558  func rewriteValueMIPS_OpNeq32(v *Value) bool {
  5559  	v_1 := v.Args[1]
  5560  	v_0 := v.Args[0]
  5561  	b := v.Block
  5562  	typ := &b.Func.Config.Types
  5563  	// match: (Neq32 x y)
  5564  	// result: (SGTU (XOR x y) (MOVWconst [0]))
  5565  	for {
  5566  		x := v_0
  5567  		y := v_1
  5568  		v.reset(OpMIPSSGTU)
  5569  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  5570  		v0.AddArg2(x, y)
  5571  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5572  		v1.AuxInt = int32ToAuxInt(0)
  5573  		v.AddArg2(v0, v1)
  5574  		return true
  5575  	}
  5576  }
  5577  func rewriteValueMIPS_OpNeq32F(v *Value) bool {
  5578  	v_1 := v.Args[1]
  5579  	v_0 := v.Args[0]
  5580  	b := v.Block
  5581  	// match: (Neq32F x y)
  5582  	// result: (FPFlagFalse (CMPEQF x y))
  5583  	for {
  5584  		x := v_0
  5585  		y := v_1
  5586  		v.reset(OpMIPSFPFlagFalse)
  5587  		v0 := b.NewValue0(v.Pos, OpMIPSCMPEQF, types.TypeFlags)
  5588  		v0.AddArg2(x, y)
  5589  		v.AddArg(v0)
  5590  		return true
  5591  	}
  5592  }
  5593  func rewriteValueMIPS_OpNeq64F(v *Value) bool {
  5594  	v_1 := v.Args[1]
  5595  	v_0 := v.Args[0]
  5596  	b := v.Block
  5597  	// match: (Neq64F x y)
  5598  	// result: (FPFlagFalse (CMPEQD x y))
  5599  	for {
  5600  		x := v_0
  5601  		y := v_1
  5602  		v.reset(OpMIPSFPFlagFalse)
  5603  		v0 := b.NewValue0(v.Pos, OpMIPSCMPEQD, types.TypeFlags)
  5604  		v0.AddArg2(x, y)
  5605  		v.AddArg(v0)
  5606  		return true
  5607  	}
  5608  }
  5609  func rewriteValueMIPS_OpNeq8(v *Value) bool {
  5610  	v_1 := v.Args[1]
  5611  	v_0 := v.Args[0]
  5612  	b := v.Block
  5613  	typ := &b.Func.Config.Types
  5614  	// match: (Neq8 x y)
  5615  	// result: (SGTU (XOR (ZeroExt8to32 x) (ZeroExt8to32 y)) (MOVWconst [0]))
  5616  	for {
  5617  		x := v_0
  5618  		y := v_1
  5619  		v.reset(OpMIPSSGTU)
  5620  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  5621  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5622  		v1.AddArg(x)
  5623  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5624  		v2.AddArg(y)
  5625  		v0.AddArg2(v1, v2)
  5626  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5627  		v3.AuxInt = int32ToAuxInt(0)
  5628  		v.AddArg2(v0, v3)
  5629  		return true
  5630  	}
  5631  }
  5632  func rewriteValueMIPS_OpNeqPtr(v *Value) bool {
  5633  	v_1 := v.Args[1]
  5634  	v_0 := v.Args[0]
  5635  	b := v.Block
  5636  	typ := &b.Func.Config.Types
  5637  	// match: (NeqPtr x y)
  5638  	// result: (SGTU (XOR x y) (MOVWconst [0]))
  5639  	for {
  5640  		x := v_0
  5641  		y := v_1
  5642  		v.reset(OpMIPSSGTU)
  5643  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  5644  		v0.AddArg2(x, y)
  5645  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5646  		v1.AuxInt = int32ToAuxInt(0)
  5647  		v.AddArg2(v0, v1)
  5648  		return true
  5649  	}
  5650  }
  5651  func rewriteValueMIPS_OpNot(v *Value) bool {
  5652  	v_0 := v.Args[0]
  5653  	// match: (Not x)
  5654  	// result: (XORconst [1] x)
  5655  	for {
  5656  		x := v_0
  5657  		v.reset(OpMIPSXORconst)
  5658  		v.AuxInt = int32ToAuxInt(1)
  5659  		v.AddArg(x)
  5660  		return true
  5661  	}
  5662  }
  5663  func rewriteValueMIPS_OpOffPtr(v *Value) bool {
  5664  	v_0 := v.Args[0]
  5665  	// match: (OffPtr [off] ptr:(SP))
  5666  	// result: (MOVWaddr [int32(off)] ptr)
  5667  	for {
  5668  		off := auxIntToInt64(v.AuxInt)
  5669  		ptr := v_0
  5670  		if ptr.Op != OpSP {
  5671  			break
  5672  		}
  5673  		v.reset(OpMIPSMOVWaddr)
  5674  		v.AuxInt = int32ToAuxInt(int32(off))
  5675  		v.AddArg(ptr)
  5676  		return true
  5677  	}
  5678  	// match: (OffPtr [off] ptr)
  5679  	// result: (ADDconst [int32(off)] ptr)
  5680  	for {
  5681  		off := auxIntToInt64(v.AuxInt)
  5682  		ptr := v_0
  5683  		v.reset(OpMIPSADDconst)
  5684  		v.AuxInt = int32ToAuxInt(int32(off))
  5685  		v.AddArg(ptr)
  5686  		return true
  5687  	}
  5688  }
  5689  func rewriteValueMIPS_OpRotateLeft16(v *Value) bool {
  5690  	v_1 := v.Args[1]
  5691  	v_0 := v.Args[0]
  5692  	b := v.Block
  5693  	typ := &b.Func.Config.Types
  5694  	// match: (RotateLeft16 <t> x (MOVWconst [c]))
  5695  	// result: (Or16 (Lsh16x32 <t> x (MOVWconst [c&15])) (Rsh16Ux32 <t> x (MOVWconst [-c&15])))
  5696  	for {
  5697  		t := v.Type
  5698  		x := v_0
  5699  		if v_1.Op != OpMIPSMOVWconst {
  5700  			break
  5701  		}
  5702  		c := auxIntToInt32(v_1.AuxInt)
  5703  		v.reset(OpOr16)
  5704  		v0 := b.NewValue0(v.Pos, OpLsh16x32, t)
  5705  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5706  		v1.AuxInt = int32ToAuxInt(c & 15)
  5707  		v0.AddArg2(x, v1)
  5708  		v2 := b.NewValue0(v.Pos, OpRsh16Ux32, t)
  5709  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5710  		v3.AuxInt = int32ToAuxInt(-c & 15)
  5711  		v2.AddArg2(x, v3)
  5712  		v.AddArg2(v0, v2)
  5713  		return true
  5714  	}
  5715  	return false
  5716  }
  5717  func rewriteValueMIPS_OpRotateLeft32(v *Value) bool {
  5718  	v_1 := v.Args[1]
  5719  	v_0 := v.Args[0]
  5720  	b := v.Block
  5721  	typ := &b.Func.Config.Types
  5722  	// match: (RotateLeft32 <t> x (MOVWconst [c]))
  5723  	// result: (Or32 (Lsh32x32 <t> x (MOVWconst [c&31])) (Rsh32Ux32 <t> x (MOVWconst [-c&31])))
  5724  	for {
  5725  		t := v.Type
  5726  		x := v_0
  5727  		if v_1.Op != OpMIPSMOVWconst {
  5728  			break
  5729  		}
  5730  		c := auxIntToInt32(v_1.AuxInt)
  5731  		v.reset(OpOr32)
  5732  		v0 := b.NewValue0(v.Pos, OpLsh32x32, t)
  5733  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5734  		v1.AuxInt = int32ToAuxInt(c & 31)
  5735  		v0.AddArg2(x, v1)
  5736  		v2 := b.NewValue0(v.Pos, OpRsh32Ux32, t)
  5737  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5738  		v3.AuxInt = int32ToAuxInt(-c & 31)
  5739  		v2.AddArg2(x, v3)
  5740  		v.AddArg2(v0, v2)
  5741  		return true
  5742  	}
  5743  	return false
  5744  }
  5745  func rewriteValueMIPS_OpRotateLeft64(v *Value) bool {
  5746  	v_1 := v.Args[1]
  5747  	v_0 := v.Args[0]
  5748  	b := v.Block
  5749  	typ := &b.Func.Config.Types
  5750  	// match: (RotateLeft64 <t> x (MOVWconst [c]))
  5751  	// result: (Or64 (Lsh64x32 <t> x (MOVWconst [c&63])) (Rsh64Ux32 <t> x (MOVWconst [-c&63])))
  5752  	for {
  5753  		t := v.Type
  5754  		x := v_0
  5755  		if v_1.Op != OpMIPSMOVWconst {
  5756  			break
  5757  		}
  5758  		c := auxIntToInt32(v_1.AuxInt)
  5759  		v.reset(OpOr64)
  5760  		v0 := b.NewValue0(v.Pos, OpLsh64x32, t)
  5761  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5762  		v1.AuxInt = int32ToAuxInt(c & 63)
  5763  		v0.AddArg2(x, v1)
  5764  		v2 := b.NewValue0(v.Pos, OpRsh64Ux32, t)
  5765  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5766  		v3.AuxInt = int32ToAuxInt(-c & 63)
  5767  		v2.AddArg2(x, v3)
  5768  		v.AddArg2(v0, v2)
  5769  		return true
  5770  	}
  5771  	return false
  5772  }
  5773  func rewriteValueMIPS_OpRotateLeft8(v *Value) bool {
  5774  	v_1 := v.Args[1]
  5775  	v_0 := v.Args[0]
  5776  	b := v.Block
  5777  	typ := &b.Func.Config.Types
  5778  	// match: (RotateLeft8 <t> x (MOVWconst [c]))
  5779  	// result: (Or8 (Lsh8x32 <t> x (MOVWconst [c&7])) (Rsh8Ux32 <t> x (MOVWconst [-c&7])))
  5780  	for {
  5781  		t := v.Type
  5782  		x := v_0
  5783  		if v_1.Op != OpMIPSMOVWconst {
  5784  			break
  5785  		}
  5786  		c := auxIntToInt32(v_1.AuxInt)
  5787  		v.reset(OpOr8)
  5788  		v0 := b.NewValue0(v.Pos, OpLsh8x32, t)
  5789  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5790  		v1.AuxInt = int32ToAuxInt(c & 7)
  5791  		v0.AddArg2(x, v1)
  5792  		v2 := b.NewValue0(v.Pos, OpRsh8Ux32, t)
  5793  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5794  		v3.AuxInt = int32ToAuxInt(-c & 7)
  5795  		v2.AddArg2(x, v3)
  5796  		v.AddArg2(v0, v2)
  5797  		return true
  5798  	}
  5799  	return false
  5800  }
  5801  func rewriteValueMIPS_OpRsh16Ux16(v *Value) bool {
  5802  	v_1 := v.Args[1]
  5803  	v_0 := v.Args[0]
  5804  	b := v.Block
  5805  	typ := &b.Func.Config.Types
  5806  	// match: (Rsh16Ux16 <t> x y)
  5807  	// result: (CMOVZ (SRL <t> (ZeroExt16to32 x) (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  5808  	for {
  5809  		t := v.Type
  5810  		x := v_0
  5811  		y := v_1
  5812  		v.reset(OpMIPSCMOVZ)
  5813  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  5814  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5815  		v1.AddArg(x)
  5816  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5817  		v2.AddArg(y)
  5818  		v0.AddArg2(v1, v2)
  5819  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5820  		v3.AuxInt = int32ToAuxInt(0)
  5821  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5822  		v4.AuxInt = int32ToAuxInt(32)
  5823  		v4.AddArg(v2)
  5824  		v.AddArg3(v0, v3, v4)
  5825  		return true
  5826  	}
  5827  }
  5828  func rewriteValueMIPS_OpRsh16Ux32(v *Value) bool {
  5829  	v_1 := v.Args[1]
  5830  	v_0 := v.Args[0]
  5831  	b := v.Block
  5832  	typ := &b.Func.Config.Types
  5833  	// match: (Rsh16Ux32 <t> x y)
  5834  	// result: (CMOVZ (SRL <t> (ZeroExt16to32 x) y) (MOVWconst [0]) (SGTUconst [32] y))
  5835  	for {
  5836  		t := v.Type
  5837  		x := v_0
  5838  		y := v_1
  5839  		v.reset(OpMIPSCMOVZ)
  5840  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  5841  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5842  		v1.AddArg(x)
  5843  		v0.AddArg2(v1, y)
  5844  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5845  		v2.AuxInt = int32ToAuxInt(0)
  5846  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5847  		v3.AuxInt = int32ToAuxInt(32)
  5848  		v3.AddArg(y)
  5849  		v.AddArg3(v0, v2, v3)
  5850  		return true
  5851  	}
  5852  }
  5853  func rewriteValueMIPS_OpRsh16Ux64(v *Value) bool {
  5854  	v_1 := v.Args[1]
  5855  	v_0 := v.Args[0]
  5856  	b := v.Block
  5857  	typ := &b.Func.Config.Types
  5858  	// match: (Rsh16Ux64 x (Const64 [c]))
  5859  	// cond: uint32(c) < 16
  5860  	// result: (SRLconst (SLLconst <typ.UInt32> x [16]) [int32(c+16)])
  5861  	for {
  5862  		x := v_0
  5863  		if v_1.Op != OpConst64 {
  5864  			break
  5865  		}
  5866  		c := auxIntToInt64(v_1.AuxInt)
  5867  		if !(uint32(c) < 16) {
  5868  			break
  5869  		}
  5870  		v.reset(OpMIPSSRLconst)
  5871  		v.AuxInt = int32ToAuxInt(int32(c + 16))
  5872  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  5873  		v0.AuxInt = int32ToAuxInt(16)
  5874  		v0.AddArg(x)
  5875  		v.AddArg(v0)
  5876  		return true
  5877  	}
  5878  	// match: (Rsh16Ux64 _ (Const64 [c]))
  5879  	// cond: uint32(c) >= 16
  5880  	// result: (MOVWconst [0])
  5881  	for {
  5882  		if v_1.Op != OpConst64 {
  5883  			break
  5884  		}
  5885  		c := auxIntToInt64(v_1.AuxInt)
  5886  		if !(uint32(c) >= 16) {
  5887  			break
  5888  		}
  5889  		v.reset(OpMIPSMOVWconst)
  5890  		v.AuxInt = int32ToAuxInt(0)
  5891  		return true
  5892  	}
  5893  	return false
  5894  }
  5895  func rewriteValueMIPS_OpRsh16Ux8(v *Value) bool {
  5896  	v_1 := v.Args[1]
  5897  	v_0 := v.Args[0]
  5898  	b := v.Block
  5899  	typ := &b.Func.Config.Types
  5900  	// match: (Rsh16Ux8 <t> x y)
  5901  	// result: (CMOVZ (SRL <t> (ZeroExt16to32 x) (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  5902  	for {
  5903  		t := v.Type
  5904  		x := v_0
  5905  		y := v_1
  5906  		v.reset(OpMIPSCMOVZ)
  5907  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  5908  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5909  		v1.AddArg(x)
  5910  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5911  		v2.AddArg(y)
  5912  		v0.AddArg2(v1, v2)
  5913  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5914  		v3.AuxInt = int32ToAuxInt(0)
  5915  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5916  		v4.AuxInt = int32ToAuxInt(32)
  5917  		v4.AddArg(v2)
  5918  		v.AddArg3(v0, v3, v4)
  5919  		return true
  5920  	}
  5921  }
  5922  func rewriteValueMIPS_OpRsh16x16(v *Value) bool {
  5923  	v_1 := v.Args[1]
  5924  	v_0 := v.Args[0]
  5925  	b := v.Block
  5926  	typ := &b.Func.Config.Types
  5927  	// match: (Rsh16x16 x y)
  5928  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt16to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt16to32 y))))
  5929  	for {
  5930  		x := v_0
  5931  		y := v_1
  5932  		v.reset(OpMIPSSRA)
  5933  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  5934  		v0.AddArg(x)
  5935  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  5936  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5937  		v2.AddArg(y)
  5938  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5939  		v3.AuxInt = int32ToAuxInt(31)
  5940  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5941  		v4.AuxInt = int32ToAuxInt(32)
  5942  		v4.AddArg(v2)
  5943  		v1.AddArg3(v2, v3, v4)
  5944  		v.AddArg2(v0, v1)
  5945  		return true
  5946  	}
  5947  }
  5948  func rewriteValueMIPS_OpRsh16x32(v *Value) bool {
  5949  	v_1 := v.Args[1]
  5950  	v_0 := v.Args[0]
  5951  	b := v.Block
  5952  	typ := &b.Func.Config.Types
  5953  	// match: (Rsh16x32 x y)
  5954  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> y (MOVWconst [31]) (SGTUconst [32] y)))
  5955  	for {
  5956  		x := v_0
  5957  		y := v_1
  5958  		v.reset(OpMIPSSRA)
  5959  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  5960  		v0.AddArg(x)
  5961  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  5962  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5963  		v2.AuxInt = int32ToAuxInt(31)
  5964  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5965  		v3.AuxInt = int32ToAuxInt(32)
  5966  		v3.AddArg(y)
  5967  		v1.AddArg3(y, v2, v3)
  5968  		v.AddArg2(v0, v1)
  5969  		return true
  5970  	}
  5971  }
  5972  func rewriteValueMIPS_OpRsh16x64(v *Value) bool {
  5973  	v_1 := v.Args[1]
  5974  	v_0 := v.Args[0]
  5975  	b := v.Block
  5976  	typ := &b.Func.Config.Types
  5977  	// match: (Rsh16x64 x (Const64 [c]))
  5978  	// cond: uint32(c) < 16
  5979  	// result: (SRAconst (SLLconst <typ.UInt32> x [16]) [int32(c+16)])
  5980  	for {
  5981  		x := v_0
  5982  		if v_1.Op != OpConst64 {
  5983  			break
  5984  		}
  5985  		c := auxIntToInt64(v_1.AuxInt)
  5986  		if !(uint32(c) < 16) {
  5987  			break
  5988  		}
  5989  		v.reset(OpMIPSSRAconst)
  5990  		v.AuxInt = int32ToAuxInt(int32(c + 16))
  5991  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  5992  		v0.AuxInt = int32ToAuxInt(16)
  5993  		v0.AddArg(x)
  5994  		v.AddArg(v0)
  5995  		return true
  5996  	}
  5997  	// match: (Rsh16x64 x (Const64 [c]))
  5998  	// cond: uint32(c) >= 16
  5999  	// result: (SRAconst (SLLconst <typ.UInt32> x [16]) [31])
  6000  	for {
  6001  		x := v_0
  6002  		if v_1.Op != OpConst64 {
  6003  			break
  6004  		}
  6005  		c := auxIntToInt64(v_1.AuxInt)
  6006  		if !(uint32(c) >= 16) {
  6007  			break
  6008  		}
  6009  		v.reset(OpMIPSSRAconst)
  6010  		v.AuxInt = int32ToAuxInt(31)
  6011  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  6012  		v0.AuxInt = int32ToAuxInt(16)
  6013  		v0.AddArg(x)
  6014  		v.AddArg(v0)
  6015  		return true
  6016  	}
  6017  	return false
  6018  }
  6019  func rewriteValueMIPS_OpRsh16x8(v *Value) bool {
  6020  	v_1 := v.Args[1]
  6021  	v_0 := v.Args[0]
  6022  	b := v.Block
  6023  	typ := &b.Func.Config.Types
  6024  	// match: (Rsh16x8 x y)
  6025  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt8to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt8to32 y))))
  6026  	for {
  6027  		x := v_0
  6028  		y := v_1
  6029  		v.reset(OpMIPSSRA)
  6030  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  6031  		v0.AddArg(x)
  6032  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6033  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6034  		v2.AddArg(y)
  6035  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6036  		v3.AuxInt = int32ToAuxInt(31)
  6037  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6038  		v4.AuxInt = int32ToAuxInt(32)
  6039  		v4.AddArg(v2)
  6040  		v1.AddArg3(v2, v3, v4)
  6041  		v.AddArg2(v0, v1)
  6042  		return true
  6043  	}
  6044  }
  6045  func rewriteValueMIPS_OpRsh32Ux16(v *Value) bool {
  6046  	v_1 := v.Args[1]
  6047  	v_0 := v.Args[0]
  6048  	b := v.Block
  6049  	typ := &b.Func.Config.Types
  6050  	// match: (Rsh32Ux16 <t> x y)
  6051  	// result: (CMOVZ (SRL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  6052  	for {
  6053  		t := v.Type
  6054  		x := v_0
  6055  		y := v_1
  6056  		v.reset(OpMIPSCMOVZ)
  6057  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6058  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  6059  		v1.AddArg(y)
  6060  		v0.AddArg2(x, v1)
  6061  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6062  		v2.AuxInt = int32ToAuxInt(0)
  6063  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6064  		v3.AuxInt = int32ToAuxInt(32)
  6065  		v3.AddArg(v1)
  6066  		v.AddArg3(v0, v2, v3)
  6067  		return true
  6068  	}
  6069  }
  6070  func rewriteValueMIPS_OpRsh32Ux32(v *Value) bool {
  6071  	v_1 := v.Args[1]
  6072  	v_0 := v.Args[0]
  6073  	b := v.Block
  6074  	typ := &b.Func.Config.Types
  6075  	// match: (Rsh32Ux32 <t> x y)
  6076  	// result: (CMOVZ (SRL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
  6077  	for {
  6078  		t := v.Type
  6079  		x := v_0
  6080  		y := v_1
  6081  		v.reset(OpMIPSCMOVZ)
  6082  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6083  		v0.AddArg2(x, y)
  6084  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6085  		v1.AuxInt = int32ToAuxInt(0)
  6086  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6087  		v2.AuxInt = int32ToAuxInt(32)
  6088  		v2.AddArg(y)
  6089  		v.AddArg3(v0, v1, v2)
  6090  		return true
  6091  	}
  6092  }
  6093  func rewriteValueMIPS_OpRsh32Ux64(v *Value) bool {
  6094  	v_1 := v.Args[1]
  6095  	v_0 := v.Args[0]
  6096  	// match: (Rsh32Ux64 x (Const64 [c]))
  6097  	// cond: uint32(c) < 32
  6098  	// result: (SRLconst x [int32(c)])
  6099  	for {
  6100  		x := v_0
  6101  		if v_1.Op != OpConst64 {
  6102  			break
  6103  		}
  6104  		c := auxIntToInt64(v_1.AuxInt)
  6105  		if !(uint32(c) < 32) {
  6106  			break
  6107  		}
  6108  		v.reset(OpMIPSSRLconst)
  6109  		v.AuxInt = int32ToAuxInt(int32(c))
  6110  		v.AddArg(x)
  6111  		return true
  6112  	}
  6113  	// match: (Rsh32Ux64 _ (Const64 [c]))
  6114  	// cond: uint32(c) >= 32
  6115  	// result: (MOVWconst [0])
  6116  	for {
  6117  		if v_1.Op != OpConst64 {
  6118  			break
  6119  		}
  6120  		c := auxIntToInt64(v_1.AuxInt)
  6121  		if !(uint32(c) >= 32) {
  6122  			break
  6123  		}
  6124  		v.reset(OpMIPSMOVWconst)
  6125  		v.AuxInt = int32ToAuxInt(0)
  6126  		return true
  6127  	}
  6128  	return false
  6129  }
  6130  func rewriteValueMIPS_OpRsh32Ux8(v *Value) bool {
  6131  	v_1 := v.Args[1]
  6132  	v_0 := v.Args[0]
  6133  	b := v.Block
  6134  	typ := &b.Func.Config.Types
  6135  	// match: (Rsh32Ux8 <t> x y)
  6136  	// result: (CMOVZ (SRL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  6137  	for {
  6138  		t := v.Type
  6139  		x := v_0
  6140  		y := v_1
  6141  		v.reset(OpMIPSCMOVZ)
  6142  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6143  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6144  		v1.AddArg(y)
  6145  		v0.AddArg2(x, v1)
  6146  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6147  		v2.AuxInt = int32ToAuxInt(0)
  6148  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6149  		v3.AuxInt = int32ToAuxInt(32)
  6150  		v3.AddArg(v1)
  6151  		v.AddArg3(v0, v2, v3)
  6152  		return true
  6153  	}
  6154  }
  6155  func rewriteValueMIPS_OpRsh32x16(v *Value) bool {
  6156  	v_1 := v.Args[1]
  6157  	v_0 := v.Args[0]
  6158  	b := v.Block
  6159  	typ := &b.Func.Config.Types
  6160  	// match: (Rsh32x16 x y)
  6161  	// result: (SRA x ( CMOVZ <typ.UInt32> (ZeroExt16to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt16to32 y))))
  6162  	for {
  6163  		x := v_0
  6164  		y := v_1
  6165  		v.reset(OpMIPSSRA)
  6166  		v0 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6167  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  6168  		v1.AddArg(y)
  6169  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6170  		v2.AuxInt = int32ToAuxInt(31)
  6171  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6172  		v3.AuxInt = int32ToAuxInt(32)
  6173  		v3.AddArg(v1)
  6174  		v0.AddArg3(v1, v2, v3)
  6175  		v.AddArg2(x, v0)
  6176  		return true
  6177  	}
  6178  }
  6179  func rewriteValueMIPS_OpRsh32x32(v *Value) bool {
  6180  	v_1 := v.Args[1]
  6181  	v_0 := v.Args[0]
  6182  	b := v.Block
  6183  	typ := &b.Func.Config.Types
  6184  	// match: (Rsh32x32 x y)
  6185  	// result: (SRA x ( CMOVZ <typ.UInt32> y (MOVWconst [31]) (SGTUconst [32] y)))
  6186  	for {
  6187  		x := v_0
  6188  		y := v_1
  6189  		v.reset(OpMIPSSRA)
  6190  		v0 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6191  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6192  		v1.AuxInt = int32ToAuxInt(31)
  6193  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6194  		v2.AuxInt = int32ToAuxInt(32)
  6195  		v2.AddArg(y)
  6196  		v0.AddArg3(y, v1, v2)
  6197  		v.AddArg2(x, v0)
  6198  		return true
  6199  	}
  6200  }
  6201  func rewriteValueMIPS_OpRsh32x64(v *Value) bool {
  6202  	v_1 := v.Args[1]
  6203  	v_0 := v.Args[0]
  6204  	// match: (Rsh32x64 x (Const64 [c]))
  6205  	// cond: uint32(c) < 32
  6206  	// result: (SRAconst x [int32(c)])
  6207  	for {
  6208  		x := v_0
  6209  		if v_1.Op != OpConst64 {
  6210  			break
  6211  		}
  6212  		c := auxIntToInt64(v_1.AuxInt)
  6213  		if !(uint32(c) < 32) {
  6214  			break
  6215  		}
  6216  		v.reset(OpMIPSSRAconst)
  6217  		v.AuxInt = int32ToAuxInt(int32(c))
  6218  		v.AddArg(x)
  6219  		return true
  6220  	}
  6221  	// match: (Rsh32x64 x (Const64 [c]))
  6222  	// cond: uint32(c) >= 32
  6223  	// result: (SRAconst x [31])
  6224  	for {
  6225  		x := v_0
  6226  		if v_1.Op != OpConst64 {
  6227  			break
  6228  		}
  6229  		c := auxIntToInt64(v_1.AuxInt)
  6230  		if !(uint32(c) >= 32) {
  6231  			break
  6232  		}
  6233  		v.reset(OpMIPSSRAconst)
  6234  		v.AuxInt = int32ToAuxInt(31)
  6235  		v.AddArg(x)
  6236  		return true
  6237  	}
  6238  	return false
  6239  }
  6240  func rewriteValueMIPS_OpRsh32x8(v *Value) bool {
  6241  	v_1 := v.Args[1]
  6242  	v_0 := v.Args[0]
  6243  	b := v.Block
  6244  	typ := &b.Func.Config.Types
  6245  	// match: (Rsh32x8 x y)
  6246  	// result: (SRA x ( CMOVZ <typ.UInt32> (ZeroExt8to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt8to32 y))))
  6247  	for {
  6248  		x := v_0
  6249  		y := v_1
  6250  		v.reset(OpMIPSSRA)
  6251  		v0 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6252  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6253  		v1.AddArg(y)
  6254  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6255  		v2.AuxInt = int32ToAuxInt(31)
  6256  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6257  		v3.AuxInt = int32ToAuxInt(32)
  6258  		v3.AddArg(v1)
  6259  		v0.AddArg3(v1, v2, v3)
  6260  		v.AddArg2(x, v0)
  6261  		return true
  6262  	}
  6263  }
  6264  func rewriteValueMIPS_OpRsh8Ux16(v *Value) bool {
  6265  	v_1 := v.Args[1]
  6266  	v_0 := v.Args[0]
  6267  	b := v.Block
  6268  	typ := &b.Func.Config.Types
  6269  	// match: (Rsh8Ux16 <t> x y)
  6270  	// result: (CMOVZ (SRL <t> (ZeroExt8to32 x) (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  6271  	for {
  6272  		t := v.Type
  6273  		x := v_0
  6274  		y := v_1
  6275  		v.reset(OpMIPSCMOVZ)
  6276  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6277  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6278  		v1.AddArg(x)
  6279  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  6280  		v2.AddArg(y)
  6281  		v0.AddArg2(v1, v2)
  6282  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6283  		v3.AuxInt = int32ToAuxInt(0)
  6284  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6285  		v4.AuxInt = int32ToAuxInt(32)
  6286  		v4.AddArg(v2)
  6287  		v.AddArg3(v0, v3, v4)
  6288  		return true
  6289  	}
  6290  }
  6291  func rewriteValueMIPS_OpRsh8Ux32(v *Value) bool {
  6292  	v_1 := v.Args[1]
  6293  	v_0 := v.Args[0]
  6294  	b := v.Block
  6295  	typ := &b.Func.Config.Types
  6296  	// match: (Rsh8Ux32 <t> x y)
  6297  	// result: (CMOVZ (SRL <t> (ZeroExt8to32 x) y) (MOVWconst [0]) (SGTUconst [32] y))
  6298  	for {
  6299  		t := v.Type
  6300  		x := v_0
  6301  		y := v_1
  6302  		v.reset(OpMIPSCMOVZ)
  6303  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6304  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6305  		v1.AddArg(x)
  6306  		v0.AddArg2(v1, y)
  6307  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6308  		v2.AuxInt = int32ToAuxInt(0)
  6309  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6310  		v3.AuxInt = int32ToAuxInt(32)
  6311  		v3.AddArg(y)
  6312  		v.AddArg3(v0, v2, v3)
  6313  		return true
  6314  	}
  6315  }
  6316  func rewriteValueMIPS_OpRsh8Ux64(v *Value) bool {
  6317  	v_1 := v.Args[1]
  6318  	v_0 := v.Args[0]
  6319  	b := v.Block
  6320  	typ := &b.Func.Config.Types
  6321  	// match: (Rsh8Ux64 x (Const64 [c]))
  6322  	// cond: uint32(c) < 8
  6323  	// result: (SRLconst (SLLconst <typ.UInt32> x [24]) [int32(c+24)])
  6324  	for {
  6325  		x := v_0
  6326  		if v_1.Op != OpConst64 {
  6327  			break
  6328  		}
  6329  		c := auxIntToInt64(v_1.AuxInt)
  6330  		if !(uint32(c) < 8) {
  6331  			break
  6332  		}
  6333  		v.reset(OpMIPSSRLconst)
  6334  		v.AuxInt = int32ToAuxInt(int32(c + 24))
  6335  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  6336  		v0.AuxInt = int32ToAuxInt(24)
  6337  		v0.AddArg(x)
  6338  		v.AddArg(v0)
  6339  		return true
  6340  	}
  6341  	// match: (Rsh8Ux64 _ (Const64 [c]))
  6342  	// cond: uint32(c) >= 8
  6343  	// result: (MOVWconst [0])
  6344  	for {
  6345  		if v_1.Op != OpConst64 {
  6346  			break
  6347  		}
  6348  		c := auxIntToInt64(v_1.AuxInt)
  6349  		if !(uint32(c) >= 8) {
  6350  			break
  6351  		}
  6352  		v.reset(OpMIPSMOVWconst)
  6353  		v.AuxInt = int32ToAuxInt(0)
  6354  		return true
  6355  	}
  6356  	return false
  6357  }
  6358  func rewriteValueMIPS_OpRsh8Ux8(v *Value) bool {
  6359  	v_1 := v.Args[1]
  6360  	v_0 := v.Args[0]
  6361  	b := v.Block
  6362  	typ := &b.Func.Config.Types
  6363  	// match: (Rsh8Ux8 <t> x y)
  6364  	// result: (CMOVZ (SRL <t> (ZeroExt8to32 x) (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  6365  	for {
  6366  		t := v.Type
  6367  		x := v_0
  6368  		y := v_1
  6369  		v.reset(OpMIPSCMOVZ)
  6370  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6371  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6372  		v1.AddArg(x)
  6373  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6374  		v2.AddArg(y)
  6375  		v0.AddArg2(v1, v2)
  6376  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6377  		v3.AuxInt = int32ToAuxInt(0)
  6378  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6379  		v4.AuxInt = int32ToAuxInt(32)
  6380  		v4.AddArg(v2)
  6381  		v.AddArg3(v0, v3, v4)
  6382  		return true
  6383  	}
  6384  }
  6385  func rewriteValueMIPS_OpRsh8x16(v *Value) bool {
  6386  	v_1 := v.Args[1]
  6387  	v_0 := v.Args[0]
  6388  	b := v.Block
  6389  	typ := &b.Func.Config.Types
  6390  	// match: (Rsh8x16 x y)
  6391  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt16to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt16to32 y))))
  6392  	for {
  6393  		x := v_0
  6394  		y := v_1
  6395  		v.reset(OpMIPSSRA)
  6396  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  6397  		v0.AddArg(x)
  6398  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6399  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  6400  		v2.AddArg(y)
  6401  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6402  		v3.AuxInt = int32ToAuxInt(31)
  6403  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6404  		v4.AuxInt = int32ToAuxInt(32)
  6405  		v4.AddArg(v2)
  6406  		v1.AddArg3(v2, v3, v4)
  6407  		v.AddArg2(v0, v1)
  6408  		return true
  6409  	}
  6410  }
  6411  func rewriteValueMIPS_OpRsh8x32(v *Value) bool {
  6412  	v_1 := v.Args[1]
  6413  	v_0 := v.Args[0]
  6414  	b := v.Block
  6415  	typ := &b.Func.Config.Types
  6416  	// match: (Rsh8x32 x y)
  6417  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> y (MOVWconst [31]) (SGTUconst [32] y)))
  6418  	for {
  6419  		x := v_0
  6420  		y := v_1
  6421  		v.reset(OpMIPSSRA)
  6422  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  6423  		v0.AddArg(x)
  6424  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6425  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6426  		v2.AuxInt = int32ToAuxInt(31)
  6427  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6428  		v3.AuxInt = int32ToAuxInt(32)
  6429  		v3.AddArg(y)
  6430  		v1.AddArg3(y, v2, v3)
  6431  		v.AddArg2(v0, v1)
  6432  		return true
  6433  	}
  6434  }
  6435  func rewriteValueMIPS_OpRsh8x64(v *Value) bool {
  6436  	v_1 := v.Args[1]
  6437  	v_0 := v.Args[0]
  6438  	b := v.Block
  6439  	typ := &b.Func.Config.Types
  6440  	// match: (Rsh8x64 x (Const64 [c]))
  6441  	// cond: uint32(c) < 8
  6442  	// result: (SRAconst (SLLconst <typ.UInt32> x [24]) [int32(c+24)])
  6443  	for {
  6444  		x := v_0
  6445  		if v_1.Op != OpConst64 {
  6446  			break
  6447  		}
  6448  		c := auxIntToInt64(v_1.AuxInt)
  6449  		if !(uint32(c) < 8) {
  6450  			break
  6451  		}
  6452  		v.reset(OpMIPSSRAconst)
  6453  		v.AuxInt = int32ToAuxInt(int32(c + 24))
  6454  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  6455  		v0.AuxInt = int32ToAuxInt(24)
  6456  		v0.AddArg(x)
  6457  		v.AddArg(v0)
  6458  		return true
  6459  	}
  6460  	// match: (Rsh8x64 x (Const64 [c]))
  6461  	// cond: uint32(c) >= 8
  6462  	// result: (SRAconst (SLLconst <typ.UInt32> x [24]) [31])
  6463  	for {
  6464  		x := v_0
  6465  		if v_1.Op != OpConst64 {
  6466  			break
  6467  		}
  6468  		c := auxIntToInt64(v_1.AuxInt)
  6469  		if !(uint32(c) >= 8) {
  6470  			break
  6471  		}
  6472  		v.reset(OpMIPSSRAconst)
  6473  		v.AuxInt = int32ToAuxInt(31)
  6474  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  6475  		v0.AuxInt = int32ToAuxInt(24)
  6476  		v0.AddArg(x)
  6477  		v.AddArg(v0)
  6478  		return true
  6479  	}
  6480  	return false
  6481  }
  6482  func rewriteValueMIPS_OpRsh8x8(v *Value) bool {
  6483  	v_1 := v.Args[1]
  6484  	v_0 := v.Args[0]
  6485  	b := v.Block
  6486  	typ := &b.Func.Config.Types
  6487  	// match: (Rsh8x8 x y)
  6488  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt8to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt8to32 y))))
  6489  	for {
  6490  		x := v_0
  6491  		y := v_1
  6492  		v.reset(OpMIPSSRA)
  6493  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  6494  		v0.AddArg(x)
  6495  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6496  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6497  		v2.AddArg(y)
  6498  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6499  		v3.AuxInt = int32ToAuxInt(31)
  6500  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6501  		v4.AuxInt = int32ToAuxInt(32)
  6502  		v4.AddArg(v2)
  6503  		v1.AddArg3(v2, v3, v4)
  6504  		v.AddArg2(v0, v1)
  6505  		return true
  6506  	}
  6507  }
  6508  func rewriteValueMIPS_OpSelect0(v *Value) bool {
  6509  	v_0 := v.Args[0]
  6510  	b := v.Block
  6511  	typ := &b.Func.Config.Types
  6512  	// match: (Select0 (Add32carry <t> x y))
  6513  	// result: (ADD <t.FieldType(0)> x y)
  6514  	for {
  6515  		if v_0.Op != OpAdd32carry {
  6516  			break
  6517  		}
  6518  		t := v_0.Type
  6519  		y := v_0.Args[1]
  6520  		x := v_0.Args[0]
  6521  		v.reset(OpMIPSADD)
  6522  		v.Type = t.FieldType(0)
  6523  		v.AddArg2(x, y)
  6524  		return true
  6525  	}
  6526  	// match: (Select0 (Add32carrywithcarry <t> x y c))
  6527  	// result: (ADD <t.FieldType(0)> c (ADD <t.FieldType(0)> x y))
  6528  	for {
  6529  		if v_0.Op != OpAdd32carrywithcarry {
  6530  			break
  6531  		}
  6532  		t := v_0.Type
  6533  		c := v_0.Args[2]
  6534  		x := v_0.Args[0]
  6535  		y := v_0.Args[1]
  6536  		v.reset(OpMIPSADD)
  6537  		v.Type = t.FieldType(0)
  6538  		v0 := b.NewValue0(v.Pos, OpMIPSADD, t.FieldType(0))
  6539  		v0.AddArg2(x, y)
  6540  		v.AddArg2(c, v0)
  6541  		return true
  6542  	}
  6543  	// match: (Select0 (Sub32carry <t> x y))
  6544  	// result: (SUB <t.FieldType(0)> x y)
  6545  	for {
  6546  		if v_0.Op != OpSub32carry {
  6547  			break
  6548  		}
  6549  		t := v_0.Type
  6550  		y := v_0.Args[1]
  6551  		x := v_0.Args[0]
  6552  		v.reset(OpMIPSSUB)
  6553  		v.Type = t.FieldType(0)
  6554  		v.AddArg2(x, y)
  6555  		return true
  6556  	}
  6557  	// match: (Select0 (MULTU (MOVWconst [0]) _ ))
  6558  	// result: (MOVWconst [0])
  6559  	for {
  6560  		if v_0.Op != OpMIPSMULTU {
  6561  			break
  6562  		}
  6563  		v_0_0 := v_0.Args[0]
  6564  		v_0_1 := v_0.Args[1]
  6565  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6566  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != 0 {
  6567  				continue
  6568  			}
  6569  			v.reset(OpMIPSMOVWconst)
  6570  			v.AuxInt = int32ToAuxInt(0)
  6571  			return true
  6572  		}
  6573  		break
  6574  	}
  6575  	// match: (Select0 (MULTU (MOVWconst [1]) _ ))
  6576  	// result: (MOVWconst [0])
  6577  	for {
  6578  		if v_0.Op != OpMIPSMULTU {
  6579  			break
  6580  		}
  6581  		v_0_0 := v_0.Args[0]
  6582  		v_0_1 := v_0.Args[1]
  6583  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6584  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != 1 {
  6585  				continue
  6586  			}
  6587  			v.reset(OpMIPSMOVWconst)
  6588  			v.AuxInt = int32ToAuxInt(0)
  6589  			return true
  6590  		}
  6591  		break
  6592  	}
  6593  	// match: (Select0 (MULTU (MOVWconst [-1]) x ))
  6594  	// result: (CMOVZ (ADDconst <x.Type> [-1] x) (MOVWconst [0]) x)
  6595  	for {
  6596  		if v_0.Op != OpMIPSMULTU {
  6597  			break
  6598  		}
  6599  		_ = v_0.Args[1]
  6600  		v_0_0 := v_0.Args[0]
  6601  		v_0_1 := v_0.Args[1]
  6602  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6603  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != -1 {
  6604  				continue
  6605  			}
  6606  			x := v_0_1
  6607  			v.reset(OpMIPSCMOVZ)
  6608  			v0 := b.NewValue0(v.Pos, OpMIPSADDconst, x.Type)
  6609  			v0.AuxInt = int32ToAuxInt(-1)
  6610  			v0.AddArg(x)
  6611  			v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6612  			v1.AuxInt = int32ToAuxInt(0)
  6613  			v.AddArg3(v0, v1, x)
  6614  			return true
  6615  		}
  6616  		break
  6617  	}
  6618  	// match: (Select0 (MULTU (MOVWconst [c]) x ))
  6619  	// cond: isPowerOfTwo(uint32(c))
  6620  	// result: (SRLconst [int32(32-log32u(uint32(c)))] x)
  6621  	for {
  6622  		if v_0.Op != OpMIPSMULTU {
  6623  			break
  6624  		}
  6625  		_ = v_0.Args[1]
  6626  		v_0_0 := v_0.Args[0]
  6627  		v_0_1 := v_0.Args[1]
  6628  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6629  			if v_0_0.Op != OpMIPSMOVWconst {
  6630  				continue
  6631  			}
  6632  			c := auxIntToInt32(v_0_0.AuxInt)
  6633  			x := v_0_1
  6634  			if !(isPowerOfTwo(uint32(c))) {
  6635  				continue
  6636  			}
  6637  			v.reset(OpMIPSSRLconst)
  6638  			v.AuxInt = int32ToAuxInt(int32(32 - log32u(uint32(c))))
  6639  			v.AddArg(x)
  6640  			return true
  6641  		}
  6642  		break
  6643  	}
  6644  	// match: (Select0 (MULTU (MOVWconst [c]) (MOVWconst [d])))
  6645  	// result: (MOVWconst [int32((int64(uint32(c))*int64(uint32(d)))>>32)])
  6646  	for {
  6647  		if v_0.Op != OpMIPSMULTU {
  6648  			break
  6649  		}
  6650  		_ = v_0.Args[1]
  6651  		v_0_0 := v_0.Args[0]
  6652  		v_0_1 := v_0.Args[1]
  6653  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6654  			if v_0_0.Op != OpMIPSMOVWconst {
  6655  				continue
  6656  			}
  6657  			c := auxIntToInt32(v_0_0.AuxInt)
  6658  			if v_0_1.Op != OpMIPSMOVWconst {
  6659  				continue
  6660  			}
  6661  			d := auxIntToInt32(v_0_1.AuxInt)
  6662  			v.reset(OpMIPSMOVWconst)
  6663  			v.AuxInt = int32ToAuxInt(int32((int64(uint32(c)) * int64(uint32(d))) >> 32))
  6664  			return true
  6665  		}
  6666  		break
  6667  	}
  6668  	// match: (Select0 (DIV (MOVWconst [c]) (MOVWconst [d])))
  6669  	// cond: d != 0
  6670  	// result: (MOVWconst [c%d])
  6671  	for {
  6672  		if v_0.Op != OpMIPSDIV {
  6673  			break
  6674  		}
  6675  		_ = v_0.Args[1]
  6676  		v_0_0 := v_0.Args[0]
  6677  		if v_0_0.Op != OpMIPSMOVWconst {
  6678  			break
  6679  		}
  6680  		c := auxIntToInt32(v_0_0.AuxInt)
  6681  		v_0_1 := v_0.Args[1]
  6682  		if v_0_1.Op != OpMIPSMOVWconst {
  6683  			break
  6684  		}
  6685  		d := auxIntToInt32(v_0_1.AuxInt)
  6686  		if !(d != 0) {
  6687  			break
  6688  		}
  6689  		v.reset(OpMIPSMOVWconst)
  6690  		v.AuxInt = int32ToAuxInt(c % d)
  6691  		return true
  6692  	}
  6693  	// match: (Select0 (DIVU (MOVWconst [c]) (MOVWconst [d])))
  6694  	// cond: d != 0
  6695  	// result: (MOVWconst [int32(uint32(c)%uint32(d))])
  6696  	for {
  6697  		if v_0.Op != OpMIPSDIVU {
  6698  			break
  6699  		}
  6700  		_ = v_0.Args[1]
  6701  		v_0_0 := v_0.Args[0]
  6702  		if v_0_0.Op != OpMIPSMOVWconst {
  6703  			break
  6704  		}
  6705  		c := auxIntToInt32(v_0_0.AuxInt)
  6706  		v_0_1 := v_0.Args[1]
  6707  		if v_0_1.Op != OpMIPSMOVWconst {
  6708  			break
  6709  		}
  6710  		d := auxIntToInt32(v_0_1.AuxInt)
  6711  		if !(d != 0) {
  6712  			break
  6713  		}
  6714  		v.reset(OpMIPSMOVWconst)
  6715  		v.AuxInt = int32ToAuxInt(int32(uint32(c) % uint32(d)))
  6716  		return true
  6717  	}
  6718  	return false
  6719  }
  6720  func rewriteValueMIPS_OpSelect1(v *Value) bool {
  6721  	v_0 := v.Args[0]
  6722  	b := v.Block
  6723  	typ := &b.Func.Config.Types
  6724  	// match: (Select1 (Add32carry <t> x y))
  6725  	// result: (SGTU <typ.Bool> x (ADD <t.FieldType(0)> x y))
  6726  	for {
  6727  		if v_0.Op != OpAdd32carry {
  6728  			break
  6729  		}
  6730  		t := v_0.Type
  6731  		y := v_0.Args[1]
  6732  		x := v_0.Args[0]
  6733  		v.reset(OpMIPSSGTU)
  6734  		v.Type = typ.Bool
  6735  		v0 := b.NewValue0(v.Pos, OpMIPSADD, t.FieldType(0))
  6736  		v0.AddArg2(x, y)
  6737  		v.AddArg2(x, v0)
  6738  		return true
  6739  	}
  6740  	// match: (Select1 (Add32carrywithcarry <t> x y c))
  6741  	// result: (OR <typ.Bool> (SGTU <typ.Bool> x xy:(ADD <t.FieldType(0)> x y)) (SGTU <typ.Bool> xy (ADD <t.FieldType(0)> c xy)))
  6742  	for {
  6743  		if v_0.Op != OpAdd32carrywithcarry {
  6744  			break
  6745  		}
  6746  		t := v_0.Type
  6747  		c := v_0.Args[2]
  6748  		x := v_0.Args[0]
  6749  		y := v_0.Args[1]
  6750  		v.reset(OpMIPSOR)
  6751  		v.Type = typ.Bool
  6752  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  6753  		xy := b.NewValue0(v.Pos, OpMIPSADD, t.FieldType(0))
  6754  		xy.AddArg2(x, y)
  6755  		v0.AddArg2(x, xy)
  6756  		v2 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  6757  		v3 := b.NewValue0(v.Pos, OpMIPSADD, t.FieldType(0))
  6758  		v3.AddArg2(c, xy)
  6759  		v2.AddArg2(xy, v3)
  6760  		v.AddArg2(v0, v2)
  6761  		return true
  6762  	}
  6763  	// match: (Select1 (Sub32carry <t> x y))
  6764  	// result: (SGTU <typ.Bool> (SUB <t.FieldType(0)> x y) x)
  6765  	for {
  6766  		if v_0.Op != OpSub32carry {
  6767  			break
  6768  		}
  6769  		t := v_0.Type
  6770  		y := v_0.Args[1]
  6771  		x := v_0.Args[0]
  6772  		v.reset(OpMIPSSGTU)
  6773  		v.Type = typ.Bool
  6774  		v0 := b.NewValue0(v.Pos, OpMIPSSUB, t.FieldType(0))
  6775  		v0.AddArg2(x, y)
  6776  		v.AddArg2(v0, x)
  6777  		return true
  6778  	}
  6779  	// match: (Select1 (MULTU (MOVWconst [0]) _ ))
  6780  	// result: (MOVWconst [0])
  6781  	for {
  6782  		if v_0.Op != OpMIPSMULTU {
  6783  			break
  6784  		}
  6785  		v_0_0 := v_0.Args[0]
  6786  		v_0_1 := v_0.Args[1]
  6787  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6788  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != 0 {
  6789  				continue
  6790  			}
  6791  			v.reset(OpMIPSMOVWconst)
  6792  			v.AuxInt = int32ToAuxInt(0)
  6793  			return true
  6794  		}
  6795  		break
  6796  	}
  6797  	// match: (Select1 (MULTU (MOVWconst [1]) x ))
  6798  	// result: x
  6799  	for {
  6800  		if v_0.Op != OpMIPSMULTU {
  6801  			break
  6802  		}
  6803  		_ = v_0.Args[1]
  6804  		v_0_0 := v_0.Args[0]
  6805  		v_0_1 := v_0.Args[1]
  6806  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6807  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != 1 {
  6808  				continue
  6809  			}
  6810  			x := v_0_1
  6811  			v.copyOf(x)
  6812  			return true
  6813  		}
  6814  		break
  6815  	}
  6816  	// match: (Select1 (MULTU (MOVWconst [-1]) x ))
  6817  	// result: (NEG <x.Type> x)
  6818  	for {
  6819  		if v_0.Op != OpMIPSMULTU {
  6820  			break
  6821  		}
  6822  		_ = v_0.Args[1]
  6823  		v_0_0 := v_0.Args[0]
  6824  		v_0_1 := v_0.Args[1]
  6825  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6826  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != -1 {
  6827  				continue
  6828  			}
  6829  			x := v_0_1
  6830  			v.reset(OpMIPSNEG)
  6831  			v.Type = x.Type
  6832  			v.AddArg(x)
  6833  			return true
  6834  		}
  6835  		break
  6836  	}
  6837  	// match: (Select1 (MULTU (MOVWconst [c]) x ))
  6838  	// cond: isPowerOfTwo(uint32(c))
  6839  	// result: (SLLconst [int32(log32u(uint32(c)))] x)
  6840  	for {
  6841  		if v_0.Op != OpMIPSMULTU {
  6842  			break
  6843  		}
  6844  		_ = v_0.Args[1]
  6845  		v_0_0 := v_0.Args[0]
  6846  		v_0_1 := v_0.Args[1]
  6847  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6848  			if v_0_0.Op != OpMIPSMOVWconst {
  6849  				continue
  6850  			}
  6851  			c := auxIntToInt32(v_0_0.AuxInt)
  6852  			x := v_0_1
  6853  			if !(isPowerOfTwo(uint32(c))) {
  6854  				continue
  6855  			}
  6856  			v.reset(OpMIPSSLLconst)
  6857  			v.AuxInt = int32ToAuxInt(int32(log32u(uint32(c))))
  6858  			v.AddArg(x)
  6859  			return true
  6860  		}
  6861  		break
  6862  	}
  6863  	// match: (Select1 (MULTU (MOVWconst [c]) (MOVWconst [d])))
  6864  	// result: (MOVWconst [int32(uint32(c)*uint32(d))])
  6865  	for {
  6866  		if v_0.Op != OpMIPSMULTU {
  6867  			break
  6868  		}
  6869  		_ = v_0.Args[1]
  6870  		v_0_0 := v_0.Args[0]
  6871  		v_0_1 := v_0.Args[1]
  6872  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6873  			if v_0_0.Op != OpMIPSMOVWconst {
  6874  				continue
  6875  			}
  6876  			c := auxIntToInt32(v_0_0.AuxInt)
  6877  			if v_0_1.Op != OpMIPSMOVWconst {
  6878  				continue
  6879  			}
  6880  			d := auxIntToInt32(v_0_1.AuxInt)
  6881  			v.reset(OpMIPSMOVWconst)
  6882  			v.AuxInt = int32ToAuxInt(int32(uint32(c) * uint32(d)))
  6883  			return true
  6884  		}
  6885  		break
  6886  	}
  6887  	// match: (Select1 (DIV (MOVWconst [c]) (MOVWconst [d])))
  6888  	// cond: d != 0
  6889  	// result: (MOVWconst [c/d])
  6890  	for {
  6891  		if v_0.Op != OpMIPSDIV {
  6892  			break
  6893  		}
  6894  		_ = v_0.Args[1]
  6895  		v_0_0 := v_0.Args[0]
  6896  		if v_0_0.Op != OpMIPSMOVWconst {
  6897  			break
  6898  		}
  6899  		c := auxIntToInt32(v_0_0.AuxInt)
  6900  		v_0_1 := v_0.Args[1]
  6901  		if v_0_1.Op != OpMIPSMOVWconst {
  6902  			break
  6903  		}
  6904  		d := auxIntToInt32(v_0_1.AuxInt)
  6905  		if !(d != 0) {
  6906  			break
  6907  		}
  6908  		v.reset(OpMIPSMOVWconst)
  6909  		v.AuxInt = int32ToAuxInt(c / d)
  6910  		return true
  6911  	}
  6912  	// match: (Select1 (DIVU (MOVWconst [c]) (MOVWconst [d])))
  6913  	// cond: d != 0
  6914  	// result: (MOVWconst [int32(uint32(c)/uint32(d))])
  6915  	for {
  6916  		if v_0.Op != OpMIPSDIVU {
  6917  			break
  6918  		}
  6919  		_ = v_0.Args[1]
  6920  		v_0_0 := v_0.Args[0]
  6921  		if v_0_0.Op != OpMIPSMOVWconst {
  6922  			break
  6923  		}
  6924  		c := auxIntToInt32(v_0_0.AuxInt)
  6925  		v_0_1 := v_0.Args[1]
  6926  		if v_0_1.Op != OpMIPSMOVWconst {
  6927  			break
  6928  		}
  6929  		d := auxIntToInt32(v_0_1.AuxInt)
  6930  		if !(d != 0) {
  6931  			break
  6932  		}
  6933  		v.reset(OpMIPSMOVWconst)
  6934  		v.AuxInt = int32ToAuxInt(int32(uint32(c) / uint32(d)))
  6935  		return true
  6936  	}
  6937  	return false
  6938  }
  6939  func rewriteValueMIPS_OpSignmask(v *Value) bool {
  6940  	v_0 := v.Args[0]
  6941  	// match: (Signmask x)
  6942  	// result: (SRAconst x [31])
  6943  	for {
  6944  		x := v_0
  6945  		v.reset(OpMIPSSRAconst)
  6946  		v.AuxInt = int32ToAuxInt(31)
  6947  		v.AddArg(x)
  6948  		return true
  6949  	}
  6950  }
  6951  func rewriteValueMIPS_OpSlicemask(v *Value) bool {
  6952  	v_0 := v.Args[0]
  6953  	b := v.Block
  6954  	// match: (Slicemask <t> x)
  6955  	// result: (SRAconst (NEG <t> x) [31])
  6956  	for {
  6957  		t := v.Type
  6958  		x := v_0
  6959  		v.reset(OpMIPSSRAconst)
  6960  		v.AuxInt = int32ToAuxInt(31)
  6961  		v0 := b.NewValue0(v.Pos, OpMIPSNEG, t)
  6962  		v0.AddArg(x)
  6963  		v.AddArg(v0)
  6964  		return true
  6965  	}
  6966  }
  6967  func rewriteValueMIPS_OpStore(v *Value) bool {
  6968  	v_2 := v.Args[2]
  6969  	v_1 := v.Args[1]
  6970  	v_0 := v.Args[0]
  6971  	// match: (Store {t} ptr val mem)
  6972  	// cond: t.Size() == 1
  6973  	// result: (MOVBstore ptr val mem)
  6974  	for {
  6975  		t := auxToType(v.Aux)
  6976  		ptr := v_0
  6977  		val := v_1
  6978  		mem := v_2
  6979  		if !(t.Size() == 1) {
  6980  			break
  6981  		}
  6982  		v.reset(OpMIPSMOVBstore)
  6983  		v.AddArg3(ptr, val, mem)
  6984  		return true
  6985  	}
  6986  	// match: (Store {t} ptr val mem)
  6987  	// cond: t.Size() == 2
  6988  	// result: (MOVHstore ptr val mem)
  6989  	for {
  6990  		t := auxToType(v.Aux)
  6991  		ptr := v_0
  6992  		val := v_1
  6993  		mem := v_2
  6994  		if !(t.Size() == 2) {
  6995  			break
  6996  		}
  6997  		v.reset(OpMIPSMOVHstore)
  6998  		v.AddArg3(ptr, val, mem)
  6999  		return true
  7000  	}
  7001  	// match: (Store {t} ptr val mem)
  7002  	// cond: t.Size() == 4 && !t.IsFloat()
  7003  	// result: (MOVWstore ptr val mem)
  7004  	for {
  7005  		t := auxToType(v.Aux)
  7006  		ptr := v_0
  7007  		val := v_1
  7008  		mem := v_2
  7009  		if !(t.Size() == 4 && !t.IsFloat()) {
  7010  			break
  7011  		}
  7012  		v.reset(OpMIPSMOVWstore)
  7013  		v.AddArg3(ptr, val, mem)
  7014  		return true
  7015  	}
  7016  	// match: (Store {t} ptr val mem)
  7017  	// cond: t.Size() == 4 && t.IsFloat()
  7018  	// result: (MOVFstore ptr val mem)
  7019  	for {
  7020  		t := auxToType(v.Aux)
  7021  		ptr := v_0
  7022  		val := v_1
  7023  		mem := v_2
  7024  		if !(t.Size() == 4 && t.IsFloat()) {
  7025  			break
  7026  		}
  7027  		v.reset(OpMIPSMOVFstore)
  7028  		v.AddArg3(ptr, val, mem)
  7029  		return true
  7030  	}
  7031  	// match: (Store {t} ptr val mem)
  7032  	// cond: t.Size() == 8 && t.IsFloat()
  7033  	// result: (MOVDstore ptr val mem)
  7034  	for {
  7035  		t := auxToType(v.Aux)
  7036  		ptr := v_0
  7037  		val := v_1
  7038  		mem := v_2
  7039  		if !(t.Size() == 8 && t.IsFloat()) {
  7040  			break
  7041  		}
  7042  		v.reset(OpMIPSMOVDstore)
  7043  		v.AddArg3(ptr, val, mem)
  7044  		return true
  7045  	}
  7046  	return false
  7047  }
  7048  func rewriteValueMIPS_OpSub32withcarry(v *Value) bool {
  7049  	v_2 := v.Args[2]
  7050  	v_1 := v.Args[1]
  7051  	v_0 := v.Args[0]
  7052  	b := v.Block
  7053  	// match: (Sub32withcarry <t> x y c)
  7054  	// result: (SUB (SUB <t> x y) c)
  7055  	for {
  7056  		t := v.Type
  7057  		x := v_0
  7058  		y := v_1
  7059  		c := v_2
  7060  		v.reset(OpMIPSSUB)
  7061  		v0 := b.NewValue0(v.Pos, OpMIPSSUB, t)
  7062  		v0.AddArg2(x, y)
  7063  		v.AddArg2(v0, c)
  7064  		return true
  7065  	}
  7066  }
  7067  func rewriteValueMIPS_OpZero(v *Value) bool {
  7068  	v_1 := v.Args[1]
  7069  	v_0 := v.Args[0]
  7070  	b := v.Block
  7071  	config := b.Func.Config
  7072  	typ := &b.Func.Config.Types
  7073  	// match: (Zero [0] _ mem)
  7074  	// result: mem
  7075  	for {
  7076  		if auxIntToInt64(v.AuxInt) != 0 {
  7077  			break
  7078  		}
  7079  		mem := v_1
  7080  		v.copyOf(mem)
  7081  		return true
  7082  	}
  7083  	// match: (Zero [1] ptr mem)
  7084  	// result: (MOVBstore ptr (MOVWconst [0]) mem)
  7085  	for {
  7086  		if auxIntToInt64(v.AuxInt) != 1 {
  7087  			break
  7088  		}
  7089  		ptr := v_0
  7090  		mem := v_1
  7091  		v.reset(OpMIPSMOVBstore)
  7092  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7093  		v0.AuxInt = int32ToAuxInt(0)
  7094  		v.AddArg3(ptr, v0, mem)
  7095  		return true
  7096  	}
  7097  	// match: (Zero [2] {t} ptr mem)
  7098  	// cond: t.Alignment()%2 == 0
  7099  	// result: (MOVHstore ptr (MOVWconst [0]) mem)
  7100  	for {
  7101  		if auxIntToInt64(v.AuxInt) != 2 {
  7102  			break
  7103  		}
  7104  		t := auxToType(v.Aux)
  7105  		ptr := v_0
  7106  		mem := v_1
  7107  		if !(t.Alignment()%2 == 0) {
  7108  			break
  7109  		}
  7110  		v.reset(OpMIPSMOVHstore)
  7111  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7112  		v0.AuxInt = int32ToAuxInt(0)
  7113  		v.AddArg3(ptr, v0, mem)
  7114  		return true
  7115  	}
  7116  	// match: (Zero [2] ptr mem)
  7117  	// result: (MOVBstore [1] ptr (MOVWconst [0]) (MOVBstore [0] ptr (MOVWconst [0]) mem))
  7118  	for {
  7119  		if auxIntToInt64(v.AuxInt) != 2 {
  7120  			break
  7121  		}
  7122  		ptr := v_0
  7123  		mem := v_1
  7124  		v.reset(OpMIPSMOVBstore)
  7125  		v.AuxInt = int32ToAuxInt(1)
  7126  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7127  		v0.AuxInt = int32ToAuxInt(0)
  7128  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  7129  		v1.AuxInt = int32ToAuxInt(0)
  7130  		v1.AddArg3(ptr, v0, mem)
  7131  		v.AddArg3(ptr, v0, v1)
  7132  		return true
  7133  	}
  7134  	// match: (Zero [4] {t} ptr mem)
  7135  	// cond: t.Alignment()%4 == 0
  7136  	// result: (MOVWstore ptr (MOVWconst [0]) mem)
  7137  	for {
  7138  		if auxIntToInt64(v.AuxInt) != 4 {
  7139  			break
  7140  		}
  7141  		t := auxToType(v.Aux)
  7142  		ptr := v_0
  7143  		mem := v_1
  7144  		if !(t.Alignment()%4 == 0) {
  7145  			break
  7146  		}
  7147  		v.reset(OpMIPSMOVWstore)
  7148  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7149  		v0.AuxInt = int32ToAuxInt(0)
  7150  		v.AddArg3(ptr, v0, mem)
  7151  		return true
  7152  	}
  7153  	// match: (Zero [4] {t} ptr mem)
  7154  	// cond: t.Alignment()%2 == 0
  7155  	// result: (MOVHstore [2] ptr (MOVWconst [0]) (MOVHstore [0] ptr (MOVWconst [0]) mem))
  7156  	for {
  7157  		if auxIntToInt64(v.AuxInt) != 4 {
  7158  			break
  7159  		}
  7160  		t := auxToType(v.Aux)
  7161  		ptr := v_0
  7162  		mem := v_1
  7163  		if !(t.Alignment()%2 == 0) {
  7164  			break
  7165  		}
  7166  		v.reset(OpMIPSMOVHstore)
  7167  		v.AuxInt = int32ToAuxInt(2)
  7168  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7169  		v0.AuxInt = int32ToAuxInt(0)
  7170  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  7171  		v1.AuxInt = int32ToAuxInt(0)
  7172  		v1.AddArg3(ptr, v0, mem)
  7173  		v.AddArg3(ptr, v0, v1)
  7174  		return true
  7175  	}
  7176  	// match: (Zero [4] ptr mem)
  7177  	// result: (MOVBstore [3] ptr (MOVWconst [0]) (MOVBstore [2] ptr (MOVWconst [0]) (MOVBstore [1] ptr (MOVWconst [0]) (MOVBstore [0] ptr (MOVWconst [0]) mem))))
  7178  	for {
  7179  		if auxIntToInt64(v.AuxInt) != 4 {
  7180  			break
  7181  		}
  7182  		ptr := v_0
  7183  		mem := v_1
  7184  		v.reset(OpMIPSMOVBstore)
  7185  		v.AuxInt = int32ToAuxInt(3)
  7186  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7187  		v0.AuxInt = int32ToAuxInt(0)
  7188  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  7189  		v1.AuxInt = int32ToAuxInt(2)
  7190  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  7191  		v2.AuxInt = int32ToAuxInt(1)
  7192  		v3 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  7193  		v3.AuxInt = int32ToAuxInt(0)
  7194  		v3.AddArg3(ptr, v0, mem)
  7195  		v2.AddArg3(ptr, v0, v3)
  7196  		v1.AddArg3(ptr, v0, v2)
  7197  		v.AddArg3(ptr, v0, v1)
  7198  		return true
  7199  	}
  7200  	// match: (Zero [3] ptr mem)
  7201  	// result: (MOVBstore [2] ptr (MOVWconst [0]) (MOVBstore [1] ptr (MOVWconst [0]) (MOVBstore [0] ptr (MOVWconst [0]) mem)))
  7202  	for {
  7203  		if auxIntToInt64(v.AuxInt) != 3 {
  7204  			break
  7205  		}
  7206  		ptr := v_0
  7207  		mem := v_1
  7208  		v.reset(OpMIPSMOVBstore)
  7209  		v.AuxInt = int32ToAuxInt(2)
  7210  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7211  		v0.AuxInt = int32ToAuxInt(0)
  7212  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  7213  		v1.AuxInt = int32ToAuxInt(1)
  7214  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  7215  		v2.AuxInt = int32ToAuxInt(0)
  7216  		v2.AddArg3(ptr, v0, mem)
  7217  		v1.AddArg3(ptr, v0, v2)
  7218  		v.AddArg3(ptr, v0, v1)
  7219  		return true
  7220  	}
  7221  	// match: (Zero [6] {t} ptr mem)
  7222  	// cond: t.Alignment()%2 == 0
  7223  	// result: (MOVHstore [4] ptr (MOVWconst [0]) (MOVHstore [2] ptr (MOVWconst [0]) (MOVHstore [0] ptr (MOVWconst [0]) mem)))
  7224  	for {
  7225  		if auxIntToInt64(v.AuxInt) != 6 {
  7226  			break
  7227  		}
  7228  		t := auxToType(v.Aux)
  7229  		ptr := v_0
  7230  		mem := v_1
  7231  		if !(t.Alignment()%2 == 0) {
  7232  			break
  7233  		}
  7234  		v.reset(OpMIPSMOVHstore)
  7235  		v.AuxInt = int32ToAuxInt(4)
  7236  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7237  		v0.AuxInt = int32ToAuxInt(0)
  7238  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  7239  		v1.AuxInt = int32ToAuxInt(2)
  7240  		v2 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  7241  		v2.AuxInt = int32ToAuxInt(0)
  7242  		v2.AddArg3(ptr, v0, mem)
  7243  		v1.AddArg3(ptr, v0, v2)
  7244  		v.AddArg3(ptr, v0, v1)
  7245  		return true
  7246  	}
  7247  	// match: (Zero [8] {t} ptr mem)
  7248  	// cond: t.Alignment()%4 == 0
  7249  	// result: (MOVWstore [4] ptr (MOVWconst [0]) (MOVWstore [0] ptr (MOVWconst [0]) mem))
  7250  	for {
  7251  		if auxIntToInt64(v.AuxInt) != 8 {
  7252  			break
  7253  		}
  7254  		t := auxToType(v.Aux)
  7255  		ptr := v_0
  7256  		mem := v_1
  7257  		if !(t.Alignment()%4 == 0) {
  7258  			break
  7259  		}
  7260  		v.reset(OpMIPSMOVWstore)
  7261  		v.AuxInt = int32ToAuxInt(4)
  7262  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7263  		v0.AuxInt = int32ToAuxInt(0)
  7264  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7265  		v1.AuxInt = int32ToAuxInt(0)
  7266  		v1.AddArg3(ptr, v0, mem)
  7267  		v.AddArg3(ptr, v0, v1)
  7268  		return true
  7269  	}
  7270  	// match: (Zero [12] {t} ptr mem)
  7271  	// cond: t.Alignment()%4 == 0
  7272  	// result: (MOVWstore [8] ptr (MOVWconst [0]) (MOVWstore [4] ptr (MOVWconst [0]) (MOVWstore [0] ptr (MOVWconst [0]) mem)))
  7273  	for {
  7274  		if auxIntToInt64(v.AuxInt) != 12 {
  7275  			break
  7276  		}
  7277  		t := auxToType(v.Aux)
  7278  		ptr := v_0
  7279  		mem := v_1
  7280  		if !(t.Alignment()%4 == 0) {
  7281  			break
  7282  		}
  7283  		v.reset(OpMIPSMOVWstore)
  7284  		v.AuxInt = int32ToAuxInt(8)
  7285  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7286  		v0.AuxInt = int32ToAuxInt(0)
  7287  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7288  		v1.AuxInt = int32ToAuxInt(4)
  7289  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7290  		v2.AuxInt = int32ToAuxInt(0)
  7291  		v2.AddArg3(ptr, v0, mem)
  7292  		v1.AddArg3(ptr, v0, v2)
  7293  		v.AddArg3(ptr, v0, v1)
  7294  		return true
  7295  	}
  7296  	// match: (Zero [16] {t} ptr mem)
  7297  	// cond: t.Alignment()%4 == 0
  7298  	// result: (MOVWstore [12] ptr (MOVWconst [0]) (MOVWstore [8] ptr (MOVWconst [0]) (MOVWstore [4] ptr (MOVWconst [0]) (MOVWstore [0] ptr (MOVWconst [0]) mem))))
  7299  	for {
  7300  		if auxIntToInt64(v.AuxInt) != 16 {
  7301  			break
  7302  		}
  7303  		t := auxToType(v.Aux)
  7304  		ptr := v_0
  7305  		mem := v_1
  7306  		if !(t.Alignment()%4 == 0) {
  7307  			break
  7308  		}
  7309  		v.reset(OpMIPSMOVWstore)
  7310  		v.AuxInt = int32ToAuxInt(12)
  7311  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7312  		v0.AuxInt = int32ToAuxInt(0)
  7313  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7314  		v1.AuxInt = int32ToAuxInt(8)
  7315  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7316  		v2.AuxInt = int32ToAuxInt(4)
  7317  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7318  		v3.AuxInt = int32ToAuxInt(0)
  7319  		v3.AddArg3(ptr, v0, mem)
  7320  		v2.AddArg3(ptr, v0, v3)
  7321  		v1.AddArg3(ptr, v0, v2)
  7322  		v.AddArg3(ptr, v0, v1)
  7323  		return true
  7324  	}
  7325  	// match: (Zero [s] {t} ptr mem)
  7326  	// cond: (s > 16 || t.Alignment()%4 != 0)
  7327  	// result: (LoweredZero [int32(t.Alignment())] ptr (ADDconst <ptr.Type> ptr [int32(s-moveSize(t.Alignment(), config))]) mem)
  7328  	for {
  7329  		s := auxIntToInt64(v.AuxInt)
  7330  		t := auxToType(v.Aux)
  7331  		ptr := v_0
  7332  		mem := v_1
  7333  		if !(s > 16 || t.Alignment()%4 != 0) {
  7334  			break
  7335  		}
  7336  		v.reset(OpMIPSLoweredZero)
  7337  		v.AuxInt = int32ToAuxInt(int32(t.Alignment()))
  7338  		v0 := b.NewValue0(v.Pos, OpMIPSADDconst, ptr.Type)
  7339  		v0.AuxInt = int32ToAuxInt(int32(s - moveSize(t.Alignment(), config)))
  7340  		v0.AddArg(ptr)
  7341  		v.AddArg3(ptr, v0, mem)
  7342  		return true
  7343  	}
  7344  	return false
  7345  }
  7346  func rewriteValueMIPS_OpZeromask(v *Value) bool {
  7347  	v_0 := v.Args[0]
  7348  	b := v.Block
  7349  	typ := &b.Func.Config.Types
  7350  	// match: (Zeromask x)
  7351  	// result: (NEG (SGTU x (MOVWconst [0])))
  7352  	for {
  7353  		x := v_0
  7354  		v.reset(OpMIPSNEG)
  7355  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  7356  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7357  		v1.AuxInt = int32ToAuxInt(0)
  7358  		v0.AddArg2(x, v1)
  7359  		v.AddArg(v0)
  7360  		return true
  7361  	}
  7362  }
  7363  func rewriteBlockMIPS(b *Block) bool {
  7364  	switch b.Kind {
  7365  	case BlockMIPSEQ:
  7366  		// match: (EQ (FPFlagTrue cmp) yes no)
  7367  		// result: (FPF cmp yes no)
  7368  		for b.Controls[0].Op == OpMIPSFPFlagTrue {
  7369  			v_0 := b.Controls[0]
  7370  			cmp := v_0.Args[0]
  7371  			b.resetWithControl(BlockMIPSFPF, cmp)
  7372  			return true
  7373  		}
  7374  		// match: (EQ (FPFlagFalse cmp) yes no)
  7375  		// result: (FPT cmp yes no)
  7376  		for b.Controls[0].Op == OpMIPSFPFlagFalse {
  7377  			v_0 := b.Controls[0]
  7378  			cmp := v_0.Args[0]
  7379  			b.resetWithControl(BlockMIPSFPT, cmp)
  7380  			return true
  7381  		}
  7382  		// match: (EQ (XORconst [1] cmp:(SGT _ _)) yes no)
  7383  		// result: (NE cmp yes no)
  7384  		for b.Controls[0].Op == OpMIPSXORconst {
  7385  			v_0 := b.Controls[0]
  7386  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7387  				break
  7388  			}
  7389  			cmp := v_0.Args[0]
  7390  			if cmp.Op != OpMIPSSGT {
  7391  				break
  7392  			}
  7393  			b.resetWithControl(BlockMIPSNE, cmp)
  7394  			return true
  7395  		}
  7396  		// match: (EQ (XORconst [1] cmp:(SGTU _ _)) yes no)
  7397  		// result: (NE cmp yes no)
  7398  		for b.Controls[0].Op == OpMIPSXORconst {
  7399  			v_0 := b.Controls[0]
  7400  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7401  				break
  7402  			}
  7403  			cmp := v_0.Args[0]
  7404  			if cmp.Op != OpMIPSSGTU {
  7405  				break
  7406  			}
  7407  			b.resetWithControl(BlockMIPSNE, cmp)
  7408  			return true
  7409  		}
  7410  		// match: (EQ (XORconst [1] cmp:(SGTconst _)) yes no)
  7411  		// result: (NE cmp yes no)
  7412  		for b.Controls[0].Op == OpMIPSXORconst {
  7413  			v_0 := b.Controls[0]
  7414  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7415  				break
  7416  			}
  7417  			cmp := v_0.Args[0]
  7418  			if cmp.Op != OpMIPSSGTconst {
  7419  				break
  7420  			}
  7421  			b.resetWithControl(BlockMIPSNE, cmp)
  7422  			return true
  7423  		}
  7424  		// match: (EQ (XORconst [1] cmp:(SGTUconst _)) yes no)
  7425  		// result: (NE cmp yes no)
  7426  		for b.Controls[0].Op == OpMIPSXORconst {
  7427  			v_0 := b.Controls[0]
  7428  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7429  				break
  7430  			}
  7431  			cmp := v_0.Args[0]
  7432  			if cmp.Op != OpMIPSSGTUconst {
  7433  				break
  7434  			}
  7435  			b.resetWithControl(BlockMIPSNE, cmp)
  7436  			return true
  7437  		}
  7438  		// match: (EQ (XORconst [1] cmp:(SGTzero _)) yes no)
  7439  		// result: (NE cmp yes no)
  7440  		for b.Controls[0].Op == OpMIPSXORconst {
  7441  			v_0 := b.Controls[0]
  7442  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7443  				break
  7444  			}
  7445  			cmp := v_0.Args[0]
  7446  			if cmp.Op != OpMIPSSGTzero {
  7447  				break
  7448  			}
  7449  			b.resetWithControl(BlockMIPSNE, cmp)
  7450  			return true
  7451  		}
  7452  		// match: (EQ (XORconst [1] cmp:(SGTUzero _)) yes no)
  7453  		// result: (NE cmp yes no)
  7454  		for b.Controls[0].Op == OpMIPSXORconst {
  7455  			v_0 := b.Controls[0]
  7456  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7457  				break
  7458  			}
  7459  			cmp := v_0.Args[0]
  7460  			if cmp.Op != OpMIPSSGTUzero {
  7461  				break
  7462  			}
  7463  			b.resetWithControl(BlockMIPSNE, cmp)
  7464  			return true
  7465  		}
  7466  		// match: (EQ (SGTUconst [1] x) yes no)
  7467  		// result: (NE x yes no)
  7468  		for b.Controls[0].Op == OpMIPSSGTUconst {
  7469  			v_0 := b.Controls[0]
  7470  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7471  				break
  7472  			}
  7473  			x := v_0.Args[0]
  7474  			b.resetWithControl(BlockMIPSNE, x)
  7475  			return true
  7476  		}
  7477  		// match: (EQ (SGTUzero x) yes no)
  7478  		// result: (EQ x yes no)
  7479  		for b.Controls[0].Op == OpMIPSSGTUzero {
  7480  			v_0 := b.Controls[0]
  7481  			x := v_0.Args[0]
  7482  			b.resetWithControl(BlockMIPSEQ, x)
  7483  			return true
  7484  		}
  7485  		// match: (EQ (SGTconst [0] x) yes no)
  7486  		// result: (GEZ x yes no)
  7487  		for b.Controls[0].Op == OpMIPSSGTconst {
  7488  			v_0 := b.Controls[0]
  7489  			if auxIntToInt32(v_0.AuxInt) != 0 {
  7490  				break
  7491  			}
  7492  			x := v_0.Args[0]
  7493  			b.resetWithControl(BlockMIPSGEZ, x)
  7494  			return true
  7495  		}
  7496  		// match: (EQ (SGTzero x) yes no)
  7497  		// result: (LEZ x yes no)
  7498  		for b.Controls[0].Op == OpMIPSSGTzero {
  7499  			v_0 := b.Controls[0]
  7500  			x := v_0.Args[0]
  7501  			b.resetWithControl(BlockMIPSLEZ, x)
  7502  			return true
  7503  		}
  7504  		// match: (EQ (MOVWconst [0]) yes no)
  7505  		// result: (First yes no)
  7506  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7507  			v_0 := b.Controls[0]
  7508  			if auxIntToInt32(v_0.AuxInt) != 0 {
  7509  				break
  7510  			}
  7511  			b.Reset(BlockFirst)
  7512  			return true
  7513  		}
  7514  		// match: (EQ (MOVWconst [c]) yes no)
  7515  		// cond: c != 0
  7516  		// result: (First no yes)
  7517  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7518  			v_0 := b.Controls[0]
  7519  			c := auxIntToInt32(v_0.AuxInt)
  7520  			if !(c != 0) {
  7521  				break
  7522  			}
  7523  			b.Reset(BlockFirst)
  7524  			b.swapSuccessors()
  7525  			return true
  7526  		}
  7527  	case BlockMIPSGEZ:
  7528  		// match: (GEZ (MOVWconst [c]) yes no)
  7529  		// cond: c >= 0
  7530  		// result: (First yes no)
  7531  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7532  			v_0 := b.Controls[0]
  7533  			c := auxIntToInt32(v_0.AuxInt)
  7534  			if !(c >= 0) {
  7535  				break
  7536  			}
  7537  			b.Reset(BlockFirst)
  7538  			return true
  7539  		}
  7540  		// match: (GEZ (MOVWconst [c]) yes no)
  7541  		// cond: c < 0
  7542  		// result: (First no yes)
  7543  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7544  			v_0 := b.Controls[0]
  7545  			c := auxIntToInt32(v_0.AuxInt)
  7546  			if !(c < 0) {
  7547  				break
  7548  			}
  7549  			b.Reset(BlockFirst)
  7550  			b.swapSuccessors()
  7551  			return true
  7552  		}
  7553  	case BlockMIPSGTZ:
  7554  		// match: (GTZ (MOVWconst [c]) yes no)
  7555  		// cond: c > 0
  7556  		// result: (First yes no)
  7557  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7558  			v_0 := b.Controls[0]
  7559  			c := auxIntToInt32(v_0.AuxInt)
  7560  			if !(c > 0) {
  7561  				break
  7562  			}
  7563  			b.Reset(BlockFirst)
  7564  			return true
  7565  		}
  7566  		// match: (GTZ (MOVWconst [c]) yes no)
  7567  		// cond: c <= 0
  7568  		// result: (First no yes)
  7569  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7570  			v_0 := b.Controls[0]
  7571  			c := auxIntToInt32(v_0.AuxInt)
  7572  			if !(c <= 0) {
  7573  				break
  7574  			}
  7575  			b.Reset(BlockFirst)
  7576  			b.swapSuccessors()
  7577  			return true
  7578  		}
  7579  	case BlockIf:
  7580  		// match: (If cond yes no)
  7581  		// result: (NE cond yes no)
  7582  		for {
  7583  			cond := b.Controls[0]
  7584  			b.resetWithControl(BlockMIPSNE, cond)
  7585  			return true
  7586  		}
  7587  	case BlockMIPSLEZ:
  7588  		// match: (LEZ (MOVWconst [c]) yes no)
  7589  		// cond: c <= 0
  7590  		// result: (First yes no)
  7591  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7592  			v_0 := b.Controls[0]
  7593  			c := auxIntToInt32(v_0.AuxInt)
  7594  			if !(c <= 0) {
  7595  				break
  7596  			}
  7597  			b.Reset(BlockFirst)
  7598  			return true
  7599  		}
  7600  		// match: (LEZ (MOVWconst [c]) yes no)
  7601  		// cond: c > 0
  7602  		// result: (First no yes)
  7603  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7604  			v_0 := b.Controls[0]
  7605  			c := auxIntToInt32(v_0.AuxInt)
  7606  			if !(c > 0) {
  7607  				break
  7608  			}
  7609  			b.Reset(BlockFirst)
  7610  			b.swapSuccessors()
  7611  			return true
  7612  		}
  7613  	case BlockMIPSLTZ:
  7614  		// match: (LTZ (MOVWconst [c]) yes no)
  7615  		// cond: c < 0
  7616  		// result: (First yes no)
  7617  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7618  			v_0 := b.Controls[0]
  7619  			c := auxIntToInt32(v_0.AuxInt)
  7620  			if !(c < 0) {
  7621  				break
  7622  			}
  7623  			b.Reset(BlockFirst)
  7624  			return true
  7625  		}
  7626  		// match: (LTZ (MOVWconst [c]) yes no)
  7627  		// cond: c >= 0
  7628  		// result: (First no yes)
  7629  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7630  			v_0 := b.Controls[0]
  7631  			c := auxIntToInt32(v_0.AuxInt)
  7632  			if !(c >= 0) {
  7633  				break
  7634  			}
  7635  			b.Reset(BlockFirst)
  7636  			b.swapSuccessors()
  7637  			return true
  7638  		}
  7639  	case BlockMIPSNE:
  7640  		// match: (NE (FPFlagTrue cmp) yes no)
  7641  		// result: (FPT cmp yes no)
  7642  		for b.Controls[0].Op == OpMIPSFPFlagTrue {
  7643  			v_0 := b.Controls[0]
  7644  			cmp := v_0.Args[0]
  7645  			b.resetWithControl(BlockMIPSFPT, cmp)
  7646  			return true
  7647  		}
  7648  		// match: (NE (FPFlagFalse cmp) yes no)
  7649  		// result: (FPF cmp yes no)
  7650  		for b.Controls[0].Op == OpMIPSFPFlagFalse {
  7651  			v_0 := b.Controls[0]
  7652  			cmp := v_0.Args[0]
  7653  			b.resetWithControl(BlockMIPSFPF, cmp)
  7654  			return true
  7655  		}
  7656  		// match: (NE (XORconst [1] cmp:(SGT _ _)) yes no)
  7657  		// result: (EQ cmp yes no)
  7658  		for b.Controls[0].Op == OpMIPSXORconst {
  7659  			v_0 := b.Controls[0]
  7660  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7661  				break
  7662  			}
  7663  			cmp := v_0.Args[0]
  7664  			if cmp.Op != OpMIPSSGT {
  7665  				break
  7666  			}
  7667  			b.resetWithControl(BlockMIPSEQ, cmp)
  7668  			return true
  7669  		}
  7670  		// match: (NE (XORconst [1] cmp:(SGTU _ _)) yes no)
  7671  		// result: (EQ cmp yes no)
  7672  		for b.Controls[0].Op == OpMIPSXORconst {
  7673  			v_0 := b.Controls[0]
  7674  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7675  				break
  7676  			}
  7677  			cmp := v_0.Args[0]
  7678  			if cmp.Op != OpMIPSSGTU {
  7679  				break
  7680  			}
  7681  			b.resetWithControl(BlockMIPSEQ, cmp)
  7682  			return true
  7683  		}
  7684  		// match: (NE (XORconst [1] cmp:(SGTconst _)) yes no)
  7685  		// result: (EQ cmp yes no)
  7686  		for b.Controls[0].Op == OpMIPSXORconst {
  7687  			v_0 := b.Controls[0]
  7688  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7689  				break
  7690  			}
  7691  			cmp := v_0.Args[0]
  7692  			if cmp.Op != OpMIPSSGTconst {
  7693  				break
  7694  			}
  7695  			b.resetWithControl(BlockMIPSEQ, cmp)
  7696  			return true
  7697  		}
  7698  		// match: (NE (XORconst [1] cmp:(SGTUconst _)) yes no)
  7699  		// result: (EQ cmp yes no)
  7700  		for b.Controls[0].Op == OpMIPSXORconst {
  7701  			v_0 := b.Controls[0]
  7702  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7703  				break
  7704  			}
  7705  			cmp := v_0.Args[0]
  7706  			if cmp.Op != OpMIPSSGTUconst {
  7707  				break
  7708  			}
  7709  			b.resetWithControl(BlockMIPSEQ, cmp)
  7710  			return true
  7711  		}
  7712  		// match: (NE (XORconst [1] cmp:(SGTzero _)) yes no)
  7713  		// result: (EQ cmp yes no)
  7714  		for b.Controls[0].Op == OpMIPSXORconst {
  7715  			v_0 := b.Controls[0]
  7716  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7717  				break
  7718  			}
  7719  			cmp := v_0.Args[0]
  7720  			if cmp.Op != OpMIPSSGTzero {
  7721  				break
  7722  			}
  7723  			b.resetWithControl(BlockMIPSEQ, cmp)
  7724  			return true
  7725  		}
  7726  		// match: (NE (XORconst [1] cmp:(SGTUzero _)) yes no)
  7727  		// result: (EQ cmp yes no)
  7728  		for b.Controls[0].Op == OpMIPSXORconst {
  7729  			v_0 := b.Controls[0]
  7730  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7731  				break
  7732  			}
  7733  			cmp := v_0.Args[0]
  7734  			if cmp.Op != OpMIPSSGTUzero {
  7735  				break
  7736  			}
  7737  			b.resetWithControl(BlockMIPSEQ, cmp)
  7738  			return true
  7739  		}
  7740  		// match: (NE (SGTUconst [1] x) yes no)
  7741  		// result: (EQ x yes no)
  7742  		for b.Controls[0].Op == OpMIPSSGTUconst {
  7743  			v_0 := b.Controls[0]
  7744  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7745  				break
  7746  			}
  7747  			x := v_0.Args[0]
  7748  			b.resetWithControl(BlockMIPSEQ, x)
  7749  			return true
  7750  		}
  7751  		// match: (NE (SGTUzero x) yes no)
  7752  		// result: (NE x yes no)
  7753  		for b.Controls[0].Op == OpMIPSSGTUzero {
  7754  			v_0 := b.Controls[0]
  7755  			x := v_0.Args[0]
  7756  			b.resetWithControl(BlockMIPSNE, x)
  7757  			return true
  7758  		}
  7759  		// match: (NE (SGTconst [0] x) yes no)
  7760  		// result: (LTZ x yes no)
  7761  		for b.Controls[0].Op == OpMIPSSGTconst {
  7762  			v_0 := b.Controls[0]
  7763  			if auxIntToInt32(v_0.AuxInt) != 0 {
  7764  				break
  7765  			}
  7766  			x := v_0.Args[0]
  7767  			b.resetWithControl(BlockMIPSLTZ, x)
  7768  			return true
  7769  		}
  7770  		// match: (NE (SGTzero x) yes no)
  7771  		// result: (GTZ x yes no)
  7772  		for b.Controls[0].Op == OpMIPSSGTzero {
  7773  			v_0 := b.Controls[0]
  7774  			x := v_0.Args[0]
  7775  			b.resetWithControl(BlockMIPSGTZ, x)
  7776  			return true
  7777  		}
  7778  		// match: (NE (MOVWconst [0]) yes no)
  7779  		// result: (First no yes)
  7780  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7781  			v_0 := b.Controls[0]
  7782  			if auxIntToInt32(v_0.AuxInt) != 0 {
  7783  				break
  7784  			}
  7785  			b.Reset(BlockFirst)
  7786  			b.swapSuccessors()
  7787  			return true
  7788  		}
  7789  		// match: (NE (MOVWconst [c]) yes no)
  7790  		// cond: c != 0
  7791  		// result: (First yes no)
  7792  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7793  			v_0 := b.Controls[0]
  7794  			c := auxIntToInt32(v_0.AuxInt)
  7795  			if !(c != 0) {
  7796  				break
  7797  			}
  7798  			b.Reset(BlockFirst)
  7799  			return true
  7800  		}
  7801  	}
  7802  	return false
  7803  }
  7804